diff --git a/nmigen/back/verilog.py b/nmigen/back/verilog.py
index cb099c9..444e124 100644
--- a/nmigen/back/verilog.py
+++ b/nmigen/back/verilog.py
@@ -36,6 +36,7 @@ def convert(*args, strip_src=False, **kwargs):
 read_ilang <<rtlil
 {}
 rtlil
+proc_prune
 proc_init
 proc_arst
 proc_dff