diff --git a/amaranth/lib/memory.py b/amaranth/lib/memory.py
index 823c5b5..697857a 100644
--- a/amaranth/lib/memory.py
+++ b/amaranth/lib/memory.py
@@ -117,7 +117,7 @@ class Memory(wiring.Component):
             return self._depth
 
         def __repr__(self):
-            return f"Memory.Init({self._elems!r})"
+            return f"Memory.Init({self._elems!r}, shape={self._shape!r}, depth={self._depth})"
 
 
     def __init__(self, *, shape, depth, init, attrs=None, src_loc_at=0):
diff --git a/tests/test_lib_memory.py b/tests/test_lib_memory.py
index d0cdcf9..07b26c2 100644
--- a/tests/test_lib_memory.py
+++ b/tests/test_lib_memory.py
@@ -290,7 +290,7 @@ class MemoryTestCase(FHDLTestCase):
         self.assertIsInstance(m.init, memory.Memory.Init)
         self.assertEqual(list(m.init), [1, 2, 3, 0])
         self.assertEqual(m.init._raw, [1, 2, 3, 0])
-        self.assertRepr(m.init, "Memory.Init([1, 2, 3, 0])")
+        self.assertRepr(m.init, "Memory.Init([1, 2, 3, 0], shape=8, depth=4)")
         self.assertEqual(m.r_ports, ())
         self.assertEqual(m.w_ports, ())