From 24c4da2b2f626b9999219fe3644535ad39e044e9 Mon Sep 17 00:00:00 2001 From: Catherine Date: Mon, 13 Dec 2021 09:53:29 +0000 Subject: [PATCH] lib.fifo: clarify AsyncFIFO{,Buffered}.r_rst documentation. NFC. --- amaranth/lib/fifo.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/amaranth/lib/fifo.py b/amaranth/lib/fifo.py index 5755aa3..4fd6f6c 100644 --- a/amaranth/lib/fifo.py +++ b/amaranth/lib/fifo.py @@ -290,8 +290,8 @@ class AsyncFIFO(Elaboratable, FIFOInterface): r_data_valid="Valid if ``r_rdy`` is asserted.", r_attributes=""" r_rst : Signal(1), out - Asserted while the FIFO is being reset by the write-domain reset (for at least one - read-domain clock cycle). + Asserted, for at least one read-domain clock cycle, after the FIFO has been reset by + the write-domain reset. """.strip(), w_attributes="") @@ -469,8 +469,8 @@ class AsyncFIFOBuffered(Elaboratable, FIFOInterface): r_data_valid="Valid if ``r_rdy`` is asserted.", r_attributes=""" r_rst : Signal(1), out - Asserted while the FIFO is being reset by the write-domain reset (for at least one - read-domain clock cycle). + Asserted, for at least one read-domain clock cycle, after the FIFO has been reset by + the write-domain reset. """.strip(), w_attributes="")