From 48a2dc212bb35b386fd145eae09c42afac7506e4 Mon Sep 17 00:00:00 2001
From: Catherine <whitequark@whitequark.org>
Date: Mon, 10 Jun 2024 11:04:25 +0100
Subject: [PATCH] sim.pysim: reset testbenches on engine reset.

---
 amaranth/sim/pysim.py | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/amaranth/sim/pysim.py b/amaranth/sim/pysim.py
index 18021ec..5ea1a5f 100644
--- a/amaranth/sim/pysim.py
+++ b/amaranth/sim/pysim.py
@@ -611,6 +611,8 @@ class PySimEngine(BaseEngine):
         self._state.reset()
         for process in self._processes:
             process.reset()
+        for testbench in self._testbenches:
+            testbench.reset()
 
     def add_clock_process(self, clock, *, phase, period):
         self._processes.add(PyClockProcess(self._state, clock,