diff --git a/amaranth/lib/crc/__init__.py b/amaranth/lib/crc/__init__.py index edf2254..1420a44 100644 --- a/amaranth/lib/crc/__init__.py +++ b/amaranth/lib/crc/__init__.py @@ -133,9 +133,7 @@ class Parameters: xor_output=self._xor_output) def residue(self): - """Obtain the residual value left in the CRC register after processing a valid trailing CRC. - - A trailing CRC data word is also known as a codeword.""" + """Obtain the residual value left in the CRC register after processing a valid trailing CRC.""" # Residue is computed by initialising to (possibly reflected) xor_output, feeding crc_width # worth of 0 bits, then taking the (possibly reflected) output without any XOR. if self._reflect_output: @@ -273,10 +271,10 @@ class Processor(Elaboratable): computes every new bit of the CRC in parallel. The :py:`match_detected` output may be used to validate data with a trailing CRC (also known as - a codeword). If the most recently processed data word(s) form the valid CRC of all the previous - data words since :py:`start` was asserted, the CRC register will always take on a fixed value - known as the :meth:`residue `. The :py:`match_detected` output indicates - whether the CRC register currently contains this residue. + a codeword in coding theory). If the most recently processed data word(s) form the valid CRC of + all the previous data words since :py:`start` was asserted, the CRC register will always take on + a fixed value known as the :meth:`residue `. The :py:`match_detected` output + indicates whether the CRC register currently contains this residue. Parameters ---------- diff --git a/docs/stdlib/crc.rst b/docs/stdlib/crc.rst index ad778d9..f650873 100644 --- a/docs/stdlib/crc.rst +++ b/docs/stdlib/crc.rst @@ -35,11 +35,11 @@ Examples from amaranth.lib.crc.catalog import CRC16_CCITT, CRC16_USB - # Compute a CRC in hardware using the predefined CRC16-CCITT algorithm and the data word + # Compute a CRC in hardware using the predefined CRC16-CCITT algorithm and a data word # width of 8 bits (in other words, computing it over bytes). m.submodules.crc16_ccitt = crc16_ccitt = CRC16_CCITT().create() - # Compute a CRC in hardware using the predefined CRC16-USB algorithm and the data word + # Compute a CRC in hardware using the predefined CRC16-USB algorithm and a data word # width of 32 bits. m.submodules.crc16_usb = crc16_usb = CRC16_USB(32).create()