From 86fdaba2db34b42a0ea990cbea28d073082c6855 Mon Sep 17 00:00:00 2001 From: Catherine Date: Mon, 10 Jun 2024 14:49:25 +0100 Subject: [PATCH] docs/simulator: improve explanation for resetting the simulation. --- amaranth/sim/core.py | 7 ++----- docs/simulator.rst | 11 +++++++++++ 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/amaranth/sim/core.py b/amaranth/sim/core.py index 95ac03c..5c50399 100644 --- a/amaranth/sim/core.py +++ b/amaranth/sim/core.py @@ -57,11 +57,8 @@ class Simulator: .. note:: - Resetting the simulator can also be used to amortize the startup cost while validating - a large design with many short test. In this case, instead of adding new testbenches, - the behavior of the already added testbenches would be modified for each of the tests. - - It can also be used to capture waveforms only for simulations that encounter an error. + Resetting the simulator can also be used to amortize the startup cost of repeatedly + simulating a large design. Arguments --------- diff --git a/docs/simulator.rst b/docs/simulator.rst index 63a6deb..b34a463 100644 --- a/docs/simulator.rst +++ b/docs/simulator.rst @@ -88,6 +88,17 @@ The captured data is saved to a :abbr:`VCD` file :file:`example1.vcd`, which can ] } +The :meth:`Simulator.reset` method reverts the simulation to its initial state. It can be used to speed up tests by capturing the waveforms only when the simulation is known to encounter an error: + +.. testcode:: + + try: + sim.run() + except: + sim.reset() + with sim.write_vcd("example1_error.vcd"): + sim.run() + Testing synchronous circuits ++++++++++++++++++++++++++++