diff --git a/amaranth/hdl/ast.py b/amaranth/hdl/ast.py
index 9dc7cff..586fbb3 100644
--- a/amaranth/hdl/ast.py
+++ b/amaranth/hdl/ast.py
@@ -860,7 +860,7 @@ class Cat(Value):
         super().__init__(src_loc_at=src_loc_at)
         self.parts = []
         for index, arg in enumerate(flatten(args)):
-            if isinstance(arg, int) and arg not in [0, 1]:
+            if isinstance(arg, int) and not isinstance(arg, Enum) and arg not in [0, 1]:
                 warnings.warn("Argument #{} of Cat() is a bare integer {} used in bit vector "
                               "context; consider specifying explicit width using C({}, {}) instead"
                               .format(index + 1, arg, arg, bits_for(arg)),
diff --git a/tests/test_hdl_ast.py b/tests/test_hdl_ast.py
index 71453de..b0cd9b2 100644
--- a/tests/test_hdl_ast.py
+++ b/tests/test_hdl_ast.py
@@ -801,6 +801,15 @@ class CatTestCase(FHDLTestCase):
             c = Cat(Color.RED, Color.BLUE)
         self.assertEqual(repr(c), "(cat (const 2'd1) (const 2'd2))")
 
+    def test_intenum(self):
+        class Color(int, Enum):
+            RED  = 1
+            BLUE = 2
+        with warnings.catch_warnings():
+            warnings.filterwarnings(action="error", category=SyntaxWarning)
+            c = Cat(Color.RED, Color.BLUE)
+        self.assertEqual(repr(c), "(cat (const 2'd1) (const 2'd2))")
+
     def test_int_wrong(self):
         with self.assertWarnsRegex(SyntaxWarning,
                 r"^Argument #1 of Cat\(\) is a bare integer 2 used in bit vector context; "