diff --git a/amaranth/build/plat.py b/amaranth/build/plat.py
index 4b922a9..3b706ab 100644
--- a/amaranth/build/plat.py
+++ b/amaranth/build/plat.py
@@ -367,8 +367,11 @@ class TemplatedPlatform(Platform):
                 strip_internal_attrs=True, write_verilog_opts=opts)
 
         def emit_debug_verilog(opts=()):
-            return verilog._convert_rtlil_text(rtlil_text,
-                strip_internal_attrs=False, write_verilog_opts=opts)
+            if not get_override_flag("debug_verilog"):
+                return "/* Debug Verilog generation was disabled. */"
+            else:
+                return verilog._convert_rtlil_text(rtlil_text,
+                    strip_internal_attrs=False, write_verilog_opts=opts)
 
         def emit_commands(syntax):
             commands = []