2018-12-16 18:15:23 -07:00
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from types import SimpleNamespace
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from nmigen import *
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2018-12-22 16:56:02 -07:00
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from nmigen.cli import main
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2018-12-16 18:15:23 -07:00
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class GPIO:
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def __init__(self, pins, bus):
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self.pins = pins
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self.bus = bus
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def get_fragment(self, platform):
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m = Module()
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2018-12-28 06:22:10 -07:00
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m.d.comb += self.bus.r_data.eq(self.pins[self.bus.addr])
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2018-12-16 18:15:23 -07:00
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with m.If(self.bus.we):
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2018-12-28 06:22:10 -07:00
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m.d.sync += self.pins[self.bus.addr].eq(self.bus.w_data)
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2018-12-16 18:15:23 -07:00
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return m.lower(platform)
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2018-12-22 16:56:02 -07:00
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if __name__ == "__main__":
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2018-12-28 06:22:10 -07:00
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bus = Record([
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("addr", 3),
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("r_data", 1),
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("w_data", 1),
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("we", 1),
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])
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2018-12-22 16:56:02 -07:00
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pins = Signal(8)
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gpio = GPIO(Array(pins), bus)
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2018-12-28 06:22:10 -07:00
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main(gpio, ports=[pins, bus.addr, bus.r_data, bus.w_data, bus.we])
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