amaranth/nmigen/test/compat/support.py

from ...compat import *
from ...compat.fhdl import verilog


class SimCase:
    def setUp(self, *args, **kwargs):
        self.tb = self.TestBench(*args, **kwargs)

    def test_to_verilog(self):
        verilog.convert(self.tb)

    def run_with(self, generator):
        run_simulation(self.tb, generator)
test.compat: import tests from Migen as appropriate. test_signed and test_coding are adjusted slightly to account for differences in comb propagation between the simulators; we might want to revert that eventually. 2018-12-18 11:05:37 -07:00			`from ...compat import *`
test.compat: reenable tests converting to Verilog. 2019-01-26 08:29:09 -07:00			`from ...compat.fhdl import verilog`
test.compat: import tests from Migen as appropriate. test_signed and test_coding are adjusted slightly to account for differences in comb propagation between the simulators; we might want to revert that eventually. 2018-12-18 11:05:37 -07:00

			`class SimCase:`
			`def setUp(self, args, *kwargs):`
			`self.tb = self.TestBench(args, *kwargs)`

test.compat: reenable tests converting to Verilog. 2019-01-26 08:29:09 -07:00			`def test_to_verilog(self):`
			`verilog.convert(self.tb)`
test.compat: import tests from Migen as appropriate. test_signed and test_coding are adjusted slightly to account for differences in comb propagation between the simulators; we might want to revert that eventually. 2018-12-18 11:05:37 -07:00
			`def run_with(self, generator):`
			`run_simulation(self.tb, generator)`