2021-12-09 22:39:50 -07:00
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from amaranth import *
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from amaranth.cli import main
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2019-10-25 19:52:34 -06:00
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class FlatGPIO(Elaboratable):
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def __init__(self, pins, bus):
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self.pins = pins
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self.bus = bus
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def elaborate(self, platform):
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bus = self.bus
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m = Module()
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m.d.comb += bus.r_data.eq(self.pins.word_select(bus.addr, len(bus.r_data)))
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with m.If(bus.we):
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m.d.sync += self.pins.word_select(bus.addr, len(bus.w_data)).eq(bus.w_data)
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return m
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if __name__ == "__main__":
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bus = Record([
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("addr", 3),
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("r_data", 2),
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("w_data", 2),
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("we", 1),
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])
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pins = Signal(8)
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gpio = FlatGPIO(pins, bus)
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main(gpio, ports=[pins, bus.addr, bus.r_data, bus.w_data, bus.we])
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