vendor.lattice_machxo*: add MachXO3L support.
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@ -43,6 +43,7 @@ nMigen can be used to target any FPGA or ASIC process that accepts behavioral Ve
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* Lattice iCE40 (toolchains: **Yosys+nextpnr**, LSE-iCECube2, Synplify-iCECube2);
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* Lattice iCE40 (toolchains: **Yosys+nextpnr**, LSE-iCECube2, Synplify-iCECube2);
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* Lattice MachXO2 (toolchains: Diamond);
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* Lattice MachXO2 (toolchains: Diamond);
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* Lattice MachXO3L (toolchains: Diamond);
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* Lattice ECP5 (toolchains: **Yosys+nextpnr**, Diamond);
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* Lattice ECP5 (toolchains: **Yosys+nextpnr**, Diamond);
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* Xilinx Spartan 3A (toolchains: ISE);
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* Xilinx Spartan 3A (toolchains: ISE);
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* Xilinx Spartan 6 (toolchains: ISE);
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* Xilinx Spartan 6 (toolchains: ISE);
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@ -4,10 +4,11 @@ from ..hdl import *
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from ..build import *
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from ..build import *
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__all__ = ["LatticeMachXO2Platform"]
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__all__ = ["LatticeMachXO2Platform", "LatticeMachXO3LPlatform"]
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# MachXO2 and MachXO3L primitives are the same. Handle both using
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class LatticeMachXO2Platform(TemplatedPlatform):
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# one class and expose user-aliases for convenience.
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class LatticeMachXO2Or3LPlatform(TemplatedPlatform):
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"""
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"""
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Required tools:
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Required tools:
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* ``pnmainc``
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* ``pnmainc``
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@ -131,7 +132,7 @@ class LatticeMachXO2Platform(TemplatedPlatform):
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]
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]
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def create_missing_domain(self, name):
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def create_missing_domain(self, name):
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# Lattice MachXO2 devices have two global set/reset signals: PUR, which is driven at
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# Lattice MachXO2/MachXO3L devices have two global set/reset signals: PUR, which is driven at
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# startup by the configuration logic and unconditionally resets every storage element,
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# startup by the configuration logic and unconditionally resets every storage element,
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# and GSR, which is driven by user logic and each storage element may be configured as
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# and GSR, which is driven by user logic and each storage element may be configured as
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# affected or unaffected by GSR. PUR is purely asynchronous, so even though it is
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# affected or unaffected by GSR. PUR is purely asynchronous, so even though it is
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@ -148,8 +149,8 @@ class LatticeMachXO2Platform(TemplatedPlatform):
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gsr0 = Signal()
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gsr0 = Signal()
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gsr1 = Signal()
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gsr1 = Signal()
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m = Module()
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m = Module()
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# There is no end-of-startup signal on MachXO2, but PUR is released after IOB enable,
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# There is no end-of-startup signal on MachXO2/MachXO3L, but PUR is released after IOB
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# so a simple reset synchronizer (with PUR as the asynchronous reset) does the job.
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# enable, so a simple reset synchronizer (with PUR as the asynchronous reset) does the job.
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m.submodules += [
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m.submodules += [
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Instance("FD1S3AX", p_GSR="DISABLED", i_CK=clk_i, i_D=~rst_i, o_Q=gsr0),
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Instance("FD1S3AX", p_GSR="DISABLED", i_CK=clk_i, i_D=~rst_i, o_Q=gsr0),
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Instance("FD1S3AX", p_GSR="DISABLED", i_CK=clk_i, i_D=gsr0, o_Q=gsr1),
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Instance("FD1S3AX", p_GSR="DISABLED", i_CK=clk_i, i_D=gsr0, o_Q=gsr1),
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@ -393,4 +394,7 @@ class LatticeMachXO2Platform(TemplatedPlatform):
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)
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)
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return m
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return m
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# CDC primitives are not currently specialized for MachXO2.
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# CDC primitives are not currently specialized for MachXO2/MachXO3L.
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LatticeMachXO2Platform = LatticeMachXO2Or3LPlatform
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LatticeMachXO3LPlatform = LatticeMachXO2Or3LPlatform
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