build.plat, hdl.ir: coordinate missing domain creation.

Platform.prepare() was completely broken after addition of local
clock domains, and only really worked before by a series of
accidents because there was a circular dependency between creation
of missing domains, fragment preparation, and insertion of pin
subfragments.

This commit untangles the dependency by adding a separate public
method Fragment.create_missing_domains(), used in build.plat.

It also makes DomainCollector consider both used and defined domains,
such that it will work on fragments before domain propagation, since
create_missing_domains() can be called by user code before prepare().

The fragment driving missing clock domain is not flattened anymore,
because flattening does not work well combined with local domains.

nmigen/test/test_hdl_ir.py

@@ -428,9 +428,8 @@ class FragmentDomainsTestCase(FHDLTestCase):
         self.assertEqual(f1.domains["sync"], f2.domains["sync"])
         self.assertEqual(new_domains, [])
         self.assertEqual(f1.subfragments, [
-            (f2, None)
+            (f2, "cd_sync")
         ])
-        self.assertTrue(f2.flatten)
 
     def test_propagate_create_missing_fragment_many_domains(self):
         s1 = Signal()
@@ -448,7 +447,7 @@ class FragmentDomainsTestCase(FHDLTestCase):
         self.assertEqual(f1.domains["sync"], f2.domains["sync"])
         self.assertEqual(new_domains, [])
         self.assertEqual(f1.subfragments, [
-            (f2, None)
+            (f2, "cd_sync")
         ])
 
     def test_propagate_create_missing_fragment_wrong(self):

nmigen/test/test_sim.py

@@ -250,7 +250,7 @@ class SimulatorUnitTestCase(FHDLTestCase):
 class SimulatorIntegrationTestCase(FHDLTestCase):
     @contextmanager
     def assertSimulation(self, module, deadline=None):
-        with Simulator(module.elaborate(platform=None)) as sim:
+        with Simulator(module) as sim:
             yield sim
             if deadline is None:
                 sim.run()