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build.plat, vendor.*: don't join strings passed as _opts overrides.

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Right now an array is expected in any _opts overrides, and if it is
actually a string (because it is passed via an environment variable,
usually), awkwardness results as each character is joined with ` `.

Fixes #130.
This commit is contained in:
whitequark 2019-07-06 23:09:46 +00:00
parent b6b9f0fc21
commit 1ee21d2007
5 changed files with 23 additions and 16 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
nmigen/build/plat.py
View file

@ -243,6 +243,12 @@ class TemplatedPlatform(Platform):
else:
return jinja2.Undefined(name=var)
def options(opts):
if isinstance(opts, str):
return opts
else:
return " ".join(opts)
def verbose(arg):
if "NMIGEN_verbose" in os.environ:
return arg
@ -259,6 +265,7 @@ class TemplatedPlatform(Platform):
try:
source = textwrap.dedent(source).strip()
compiled = jinja2.Template(source, trim_blocks=True, lstrip_blocks=True)
compiled.environment.filters["options"] = options
except jinja2.TemplateSyntaxError as e:
e.args = ("{} (at {}:{})".format(e.message, origin, e.lineno),)
raise

10
nmigen/vendor/lattice_ecp5.py vendored
View file

@ -68,14 +68,14 @@ class LatticeECP5Platform(TemplatedPlatform):
"{{name}}.ys": r"""
# {{autogenerated}}
{% for file in platform.iter_extra_files(".v") -%}
read_verilog {{get_override("read_opts")|join(" ")}} {{file}}
read_verilog {{get_override("read_opts")|options}} {{file}}
{% endfor %}
{% for file in platform.iter_extra_files(".sv") -%}
read_verilog -sv {{get_override("read_opts")|join(" ")}} {{file}}
read_verilog -sv {{get_override("read_opts")|options}} {{file}}
{% endfor %}
read_ilang {{name}}.il
{{get_override("script_after_read")|default("# (script_after_read placeholder)")}}
synth_ecp5 {{get_override("synth_opts")|join(" ")}} -top {{name}}
synth_ecp5 {{get_override("synth_opts")|options}} -top {{name}}
{{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}
write_json {{name}}.json
""",
@ -97,14 +97,14 @@ class LatticeECP5Platform(TemplatedPlatform):
r"""
{{get_tool("yosys")}}
{{quiet("-q")}}
{{get_override("yosys_opts")|join(" ")}}
{{get_override("yosys_opts")|options}}
-l {{name}}.rpt
{{name}}.ys
""",
r"""
{{get_tool("nextpnr-ecp5")}}
{{quiet("--quiet")}}
{{get_override("nextpnr_opts")|join(" ")}}
{{get_override("nextpnr_opts")|options}}
--log {{name}}.tim
{{platform._nextpnr_device_options[platform.device]}}
--package {{platform._nextpnr_package_options[platform.package]|upper}}

10
nmigen/vendor/lattice_ice40.py vendored
View file

@ -60,14 +60,14 @@ class LatticeICE40Platform(TemplatedPlatform):
"{{name}}.ys": r"""
# {{autogenerated}}
{% for file in platform.iter_extra_files(".v") -%}
read_verilog {{get_override("read_opts")|join(" ")}} {{file}}
read_verilog {{get_override("read_opts")|options}} {{file}}
{% endfor %}
{% for file in platform.iter_extra_files(".sv") -%}
read_verilog -sv {{get_override("read_opts")|join(" ")}} {{file}}
read_verilog -sv {{get_override("read_opts")|options}} {{file}}
{% endfor %}
read_ilang {{name}}.il
{{get_override("script_after_read")|default("# (script_after_read placeholder)")}}
synth_ice40 {{get_override("synth_opts")|join(" ")}} -top {{name}}
synth_ice40 {{get_override("synth_opts")|options}} -top {{name}}
{{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}
write_json {{name}}.json
""",
@ -89,14 +89,14 @@ class LatticeICE40Platform(TemplatedPlatform):
r"""
{{get_tool("yosys")}}
{{quiet("-q")}}
{{get_override("yosys_opts")|join(" ")}}
{{get_override("yosys_opts")|options}}
-l {{name}}.rpt
{{name}}.ys
""",
r"""
{{get_tool("nextpnr-ice40")}}
{{quiet("--quiet")}}
{{get_override("nextpnr_opts")|default(["--placer","heap"])|join(" ")}}
{{get_override("nextpnr_opts")|default(["--placer","heap"])|options}}
--log {{name}}.tim
{{platform._nextpnr_device_options[platform.device]}}
--package

2
nmigen/vendor/xilinx_7series.py vendored
View file

@ -109,7 +109,7 @@ class Xilinx7SeriesPlatform(TemplatedPlatform):
r"""
{{get_tool("vivado")}}
{{verbose("-verbose")}}
{{get_override("vivado_opts")|join(" ")}}
{{get_override("vivado_opts")|options}}
-mode batch
-log {{name}}.log
-source {{name}}.tcl

10
nmigen/vendor/xilinx_spartan6.py vendored
View file

@ -93,35 +93,35 @@ class XilinxSpartan6Platform(TemplatedPlatform):
command_templates = [
r"""
{{get_tool("xst")}}
{{get_override("xst_opts")|join(" ")}}
{{get_override("xst_opts")|options}}
-ifn {{name}}.xst
""",
r"""
{{get_tool("ngdbuild")}}
{{quiet("-quiet")}}
{{verbose("-verbose")}}
{{get_override("ngdbuild_opts")|join(" ")}}
{{get_override("ngdbuild_opts")|options}}
-uc {{name}}.ucf
{{name}}.ngc
""",
r"""
{{get_tool("map")}}
{{verbose("-detail")}}
{{get_override("map_opts")|default(["-w"])|join(" ")}}
{{get_override("map_opts")|default(["-w"])|options}}
-o {{name}}_map.ncd
{{name}}.ngd
{{name}}.pcf
""",
r"""
{{get_tool("par")}}
{{get_override("par_opts")|default(["-w"])|join(" ")}}
{{get_override("par_opts")|default(["-w"])|options}}
{{name}}_map.ncd
{{name}}_par.ncd
{{name}}.pcf
""",
r"""
{{get_tool("bitgen")}}
{{get_override("bitgen_opts")|default(["-w"])|join(" ")}}
{{get_override("bitgen_opts")|default(["-w"])|options}}
{{name}}_par.ncd
{{name}}.bit
"""