lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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4 changed files with 215 additions and 53 deletions
98
nmigen/test/test_lib_io.py
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98
nmigen/test/test_lib_io.py
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from .tools import *
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from ..hdl.ast import *
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from ..hdl.rec import *
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from ..lib.io import *
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class PinLayoutSDRTestCase(FHDLTestCase):
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def test_pin_layout_i(self):
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layout_1 = pin_layout(1, dir="i")
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self.assertEqual(layout_1.fields, {
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"i": (1, DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="i")
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self.assertEqual(layout_2.fields, {
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"i": (2, DIR_NONE),
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})
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def test_pin_layout_o(self):
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layout_1 = pin_layout(1, dir="o")
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self.assertEqual(layout_1.fields, {
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"o": (1, DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="o")
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self.assertEqual(layout_2.fields, {
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"o": (2, DIR_NONE),
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})
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def test_pin_layout_io(self):
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layout_1 = pin_layout(1, dir="io")
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self.assertEqual(layout_1.fields, {
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"i": (1, DIR_NONE),
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"o": (1, DIR_NONE),
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"oe": (1, DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="io")
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self.assertEqual(layout_2.fields, {
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"i": (2, DIR_NONE),
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"o": (2, DIR_NONE),
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"oe": (1, DIR_NONE),
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})
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class PinLayoutDDRTestCase(FHDLTestCase):
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def test_pin_layout_i(self):
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layout_1 = pin_layout(1, dir="i", xdr=2)
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self.assertEqual(layout_1.fields, {
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"i0": (1, DIR_NONE),
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"i1": (1, DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="i", xdr=2)
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self.assertEqual(layout_2.fields, {
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"i0": (2, DIR_NONE),
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"i1": (2, DIR_NONE),
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})
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def test_pin_layout_o(self):
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layout_1 = pin_layout(1, dir="o", xdr=2)
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self.assertEqual(layout_1.fields, {
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"o0": (1, DIR_NONE),
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"o1": (1, DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="o", xdr=2)
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self.assertEqual(layout_2.fields, {
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"o0": (2, DIR_NONE),
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"o1": (2, DIR_NONE),
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})
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def test_pin_layout_io(self):
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layout_1 = pin_layout(1, dir="io", xdr=2)
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self.assertEqual(layout_1.fields, {
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"i0": (1, DIR_NONE),
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"i1": (1, DIR_NONE),
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"o0": (1, DIR_NONE),
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"o1": (1, DIR_NONE),
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"oe": (1, DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="io", xdr=2)
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self.assertEqual(layout_2.fields, {
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"i0": (2, DIR_NONE),
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"i1": (2, DIR_NONE),
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"o0": (2, DIR_NONE),
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"o1": (2, DIR_NONE),
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"oe": (1, DIR_NONE),
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})
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class PinTestCase(FHDLTestCase):
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def test_attributes(self):
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pin = Pin(2, dir="io", xdr=2)
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self.assertEqual(pin.width, 2)
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self.assertEqual(pin.dir, "io")
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self.assertEqual(pin.xdr, 2)
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