hdl.dsl: fix src_loc_at for FSM state signal.

2019-07-03 16:34:31 +00:00 · 2019-07-03 16:34:31 +00:00 · 2e4cc47fcb
parent 82903e493a
commit 2e4cc47fcb
1 changed files with 1 additions and 1 deletions
--- a/nmigen/hdl/dsl.py
+++ b/nmigen/hdl/dsl.py
@ -248,7 +248,7 @@ class Module(_ModuleBuilderRoot, Elaboratable):
        self._check_context("FSM", context=None)
        fsm_data = self._set_ctrl("FSM", {
            "name":     name,
-            "signal":   Signal(name="{}_state".format(name)),
+            "signal":   Signal(name="{}_state".format(name), src_loc_at=2),
            "reset":    reset,
            "domain":   domain,
            "encoding": OrderedDict(),