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hdl.ast: fix Slice validation.

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Fixes #810.
This commit is contained in:
Marcelina Kościelnicka 2023-06-07 14:09:19 +02:00 committed by Catherine
parent c7984463c7
commit 3180a17fd9
2 changed files with 5 additions and 2 deletions
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4
amaranth/hdl/ast.py
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@ -796,11 +796,11 @@ class Slice(Value):
raise TypeError("Slice stop must be an integer, not {!r}".format(stop)) raise TypeError("Slice stop must be an integer, not {!r}".format(stop))
n = len(value) n = len(value)
if start not in range(-(n+1), n+1): if start not in range(-n, n+1):
raise IndexError("Cannot start slice {} bits into {}-bit value".format(start, n)) raise IndexError("Cannot start slice {} bits into {}-bit value".format(start, n))
if start < 0: if start < 0:
start += n start += n
if stop not in range(-(n+1), n+1): if stop not in range(-n, n+1):
raise IndexError("Cannot stop slice {} bits into {}-bit value".format(stop, n)) raise IndexError("Cannot stop slice {} bits into {}-bit value".format(stop, n))
if stop < 0: if stop < 0:
stop += n stop += n

3
tests/test_hdl_ast.py
View file

@ -714,6 +714,9 @@ class SliceTestCase(FHDLTestCase):
with self.assertRaisesRegex(IndexError, with self.assertRaisesRegex(IndexError,
r"^Slice start 4 must be less than slice stop 2$"): r"^Slice start 4 must be less than slice stop 2$"):
Slice(c, 4, 2) Slice(c, 4, 2)
with self.assertRaisesRegex(IndexError,
r"^Cannot start slice -9 bits into 8-bit value$"):
Slice(c, -9, -5)
def test_repr(self): def test_repr(self):
s1 = Const(10)[2] s1 = Const(10)[2]