hdl: remove Repl per RFC 10.

Closes #770.
This commit is contained in:
Catherine 2024-01-31 02:55:57 +00:00
parent 4da8adf7ba
commit 357ffb680c
6 changed files with 5 additions and 58 deletions

View file

@ -970,27 +970,6 @@ class CatTestCase(FHDLTestCase):
self.assertEqual(a.signed, False)
class ReplTestCase(FHDLTestCase):
@_ignore_deprecated
def test_cast(self):
r = Repl(0, 3)
self.assertEqual(repr(r), "(cat (const 1'd0) (const 1'd0) (const 1'd0))")
@_ignore_deprecated
def test_int_01(self):
with warnings.catch_warnings():
warnings.filterwarnings(action="error", category=SyntaxWarning)
Repl(0, 3)
Repl(1, 3)
@_ignore_deprecated
def test_int_wrong(self):
with self.assertWarnsRegex(SyntaxWarning,
r"^Value argument of Repl\(\) is a bare integer 2 used in bit vector context; "
r"consider specifying explicit width using C\(2, 2\) instead$"):
Repl(2, 3)
class ArrayTestCase(FHDLTestCase):
def test_acts_like_array(self):
a = Array([1,2,3])