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hdl.dsl: forbid m.next= inside of FSM but outside of FSM state, too.

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This commit is contained in:
whitequark 2018-12-26 12:42:43 +00:00
parent 934546e633
commit 35a44f017f
2 changed files with 17 additions and 12 deletions
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6
nmigen/test/test_hdl_dsl.py
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@ -392,8 +392,12 @@ class DSLTestCase(FHDLTestCase):
msg="Only assignment to `m.next` is permitted"):
m.next
with self.assertRaises(SyntaxError,
msg="`m.next = <...>` is only permitted inside an FSM"):
msg="`m.next = <...>` is only permitted inside an FSM state"):
m.next = "FOO"
with self.assertRaises(SyntaxError,
msg="`m.next = <...>` is only permitted inside an FSM state"):
with m.FSM():
m.next = "FOO"
def test_auto_pop_ctrl(self):
m = Module()