test_build_res: fix after commit 3e2ecdf2
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3e2ecdf2fb
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@ -196,15 +196,15 @@ class ResourceManagerTestCase(FHDLTestCase):
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clk50 = self.cm.request("clk50", 0, dir="i")
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clk100_port_p, clk100_port_n, clk50_port = self.cm.iter_ports()
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self.assertEqual(list(self.cm.iter_clock_constraints()), [
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(clk100.i, 100e6),
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(clk50.i, 50e6)
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(clk100.i, clk100_port_p, 100e6),
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(clk50.i, clk50_port, 50e6)
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])
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def test_add_clock(self):
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i2c = self.cm.request("i2c")
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self.cm.add_clock_constraint(i2c.scl.o, 100e3)
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self.assertEqual(list(self.cm.iter_clock_constraints()), [
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(i2c.scl.o, 100e3)
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(i2c.scl.o, None, 100e3)
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])
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def test_wrong_resources(self):
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