lib.coding: fix tests to actually run, and fix code to fix tests.
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470d66934f
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@ -69,7 +69,7 @@ class PriorityEncoder:
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m = Module()
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for j, b in enumerate(reversed(self.i)):
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with m.If(b):
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m.d.comb += self.o.eq(j)
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m.d.comb += self.o.eq(len(self.i) - j - 1)
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m.d.comb += self.n.eq(self.i == 0)
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return m.lower(platform)
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@ -105,9 +105,8 @@ class Decoder:
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for j in range(len(self.o)):
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with m.Case(j):
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m.d.comb += self.o.eq(1 << j)
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with m.Case():
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with m.If(self.n):
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m.d.comb += self.o.eq(0)
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with m.If(self.n):
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m.d.comb += self.o.eq(0)
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return m.lower(platform)
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@ -28,6 +28,7 @@ class EncoderTestCase(FHDLTestCase):
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self.assertEqual((yield enc.o), 0)
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sim.add_process(process)
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sim.run()
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class PriorityEncoderTestCase(FHDLTestCase):
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@ -54,6 +55,7 @@ class PriorityEncoderTestCase(FHDLTestCase):
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self.assertEqual((yield enc.o), 1)
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sim.add_process(process)
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sim.run()
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class DecoderTestCase(FHDLTestCase):
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@ -61,18 +63,19 @@ class DecoderTestCase(FHDLTestCase):
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dec = Decoder(4)
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with Simulator(dec) as sim:
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def process():
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self.assertEqual((yield enc.o), 0b0001)
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self.assertEqual((yield dec.o), 0b0001)
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yield enc.i.eq(1)
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yield dec.i.eq(1)
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yield Delay()
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self.assertEqual((yield enc.o), 0b0010)
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self.assertEqual((yield dec.o), 0b0010)
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yield enc.i.eq(3)
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yield dec.i.eq(3)
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yield Delay()
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self.assertEqual((yield enc.o), 0b1000)
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self.assertEqual((yield dec.o), 0b1000)
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yield enc.n.eq(1)
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yield dec.n.eq(1)
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yield Delay()
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self.assertEqual((yield enc.o), 0b0000)
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self.assertEqual((yield dec.o), 0b0000)
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sim.add_process(process)
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sim.run()
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