Implement RFC 27 amendment: deprecate add_sync_process, not add_process.
This commit is contained in:
parent
2d42d649ee
commit
4014f6429c
7 changed files with 122 additions and 141 deletions
|
|
@ -23,12 +23,12 @@ print(verilog.convert(ctr, ports=[ctr.o, ctr.en]))
|
|||
sim = Simulator(ctr)
|
||||
sim.add_clock(1e-6)
|
||||
def ce_proc():
|
||||
yield; yield; yield
|
||||
yield Tick(); yield Tick(); yield Tick()
|
||||
yield ctr.en.eq(1)
|
||||
yield; yield; yield
|
||||
yield Tick(); yield Tick(); yield Tick()
|
||||
yield ctr.en.eq(0)
|
||||
yield; yield; yield
|
||||
yield Tick(); yield Tick(); yield Tick()
|
||||
yield ctr.en.eq(1)
|
||||
sim.add_sync_process(ce_proc)
|
||||
sim.add_testbench(ce_proc)
|
||||
with sim.write_vcd("ctrl.vcd", "ctrl.gtkw", traces=[ctr.en, ctr.v, ctr.o]):
|
||||
sim.run_until(100e-6, run_passive=True)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue