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vendor.fpga.lattice_ice40: implement differential input buffers.

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This commit is contained in:
whitequark 2019-06-03 08:38:12 +00:00
parent 3116d4add2
commit 41adcc3f97
4 changed files with 43 additions and 17 deletions
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6
nmigen/test/test_build_res.py
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@ -115,12 +115,6 @@ class ConstraintManagerTestCase(FHDLTestCase):
("clk100_0__p", ["H1"], {}),
("clk100_0__n", ["H2"], {}),
])
self.assertEqual(list(self.cm.iter_port_constraints(diff_pins="p")), [
("clk100_0__p", ["H1"], {}),
])
self.assertEqual(list(self.cm.iter_port_constraints(diff_pins="n")), [
("clk100_0__n", ["H2"], {}),
])
def test_request_raw(self):
clk50 = self.cm.request("clk50", 0, dir="-")