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amaranth/lib/crc/__init__.py
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amaranth/lib/crc/__init__.py
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"""
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Utilities for computing cyclic redundancy checks (CRCs) in software and in
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hardware.
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CRCs are specified using the :py:class:`Algorithm` class, which contains
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settings for CRC width, polynomial, initial value, input/output reflection, and
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output XOR. Many commonly used CRC algorithms are available in the
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:py:mod:`~amaranth.lib.crc.catalog` module, while most other CRC designs can be
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accommodated by manually constructing :py:class:`Algorithm`.
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Call the :py:class:`Algorithm` with a ``data_width`` to obtain a
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:py:class:`Parameters` class, which fully defines a CRC computation. The
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:py:class:`Parameters` class provides the :py:meth:`~Parameters.compute` method
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to perform software computations, and the :py:meth:`~Parameters.create` method
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to create a hardware CRC module, :py:class:`Processor`.
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.. code-block::
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# Create a predefined CRC16-CCITT hardware module, using the default
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# 8-bit data width (in other words, bytes).
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from amaranth.lib.crc.catalog import CRC16_CCITT
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crc = m.submodules.crc = CRC16_CCITT().create()
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# Create a custom CRC algorithm, specify the data width explicitly,
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# and use it to compute a CRC value in software.
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from amaranth.lib.crc import Algorithm
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algo = Algorithm(crc_width=16, polynomial=0x1021, initial_crc=0xffff,
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reflect_input=False, reflect_output=False,
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xor_output=0x0000)
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assert algo(data_width=8).compute(b"123456789") == 0x29b1
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"""
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from ... import *
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__all__ = ["Algorithm", "Parameters", "Processor", "catalog"]
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class Algorithm:
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"""
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Settings for a CRC algorithm, excluding data width.
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The parameter set is based on the Williams model from
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"A Painless Guide to CRC Error Detection Algorithms":
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http://www.ross.net/crc/download/crc_v3.txt
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For a reference of standard CRC parameter sets, refer to:
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* `reveng`_'s catalogue, which uses an identical parameterisation,
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* `crcmod`_'s list of predefined functions, but remove the leading '1'
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from the polynominal, XOR the "Init-value" with "XOR-out" to obtain
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``initial_crc``, and where "Reversed" is True, set both ``reflect_input``
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and ``reflect_output`` to True,
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* `CRC Zoo`_, which contains only polynomials; use the "explicit +1"
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form of polynomial but remove the leading '1'.
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.. _reveng: https://reveng.sourceforge.io/crc-catalogue/all.htm
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.. _crcmod: http://crcmod.sourceforge.net/crcmod.predefined.html
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.. _CRC Zoo: https://users.ece.cmu.edu/~koopman/crc/
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Many commonly used CRC algorithms are available in the
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:py:mod:`~amaranth.lib.crc.catalog` module, which includes
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all entries in the `reveng`_ catalogue.
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To create a :py:class:`Parameters` instance, call the :py:class:`Algorithm`
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object with the required data width, which defaults to 8 bits.
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Parameters
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----------
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crc_width : int
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Bit width of CRC word. Also known as "width" in the Williams model.
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polynomial : int
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CRC polynomial to use, ``crc_width`` bits long, without the implicit
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``x**crc_width`` term. Polynomial is always specified with the highest
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order terms in the most significant bit positions; use
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``reflect_input`` and ``reflect_output`` to perform a least
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significant bit first computation.
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initial_crc : int
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Initial value of CRC register at reset. Most significant bit always
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corresponds to the highest order term in the CRC register.
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reflect_input : bool
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If True, the input data words are bit-reflected, so that they are
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processed least significant bit first.
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reflect_output : bool
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If True, the output CRC is bit-reflected, so the least-significant bit
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of the output is the highest-order bit of the CRC register.
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Note that this reflection is performed over the entire CRC register;
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for transmission you may want to treat the output as a little-endian
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multi-word value, so for example the reflected 16-bit output 0x4E4C
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would be transmitted as the two octets 0x4C 0x4E, each transmitted
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least significant bit first.
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xor_output : int
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The output CRC will be the CRC register XOR'd with this value, applied
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after any output bit-reflection.
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"""
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def __init__(self, *, crc_width, polynomial, initial_crc, reflect_input,
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reflect_output, xor_output):
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self.crc_width = int(crc_width)
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self.polynomial = int(polynomial)
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self.initial_crc = int(initial_crc)
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self.reflect_input = bool(reflect_input)
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self.reflect_output = bool(reflect_output)
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self.xor_output = int(xor_output)
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if self.crc_width <= 0:
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raise ValueError("crc_width must be greater than 0")
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if not 0 <= self.polynomial < 2 ** self.crc_width:
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raise ValueError("polynomial must be between 0 and 2**crc_width - 1")
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if not 0 <= self.initial_crc < 2 ** self.crc_width:
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raise ValueError("initial_crc must be between 0 and 2**crc_width - 1")
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if not 0 <= self.xor_output < 2 ** self.crc_width:
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raise ValueError("xor_output must be between 0 and 2**crc_width - 1")
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def __call__(self, data_width=8):
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"""
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Constructs a :py:class:`Parameters` instance from this
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:py:class:`Algorithm` with the specified ``data_width``.
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Parameters
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----------
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data_width : int
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Bit width of data words, default 8.
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"""
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return Parameters(self, data_width)
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def __repr__(self):
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return f"Algorithm(crc_width={self.crc_width}," \
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f" polynomial=0x{self.polynomial:0{self.crc_width//4}x}," \
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f" initial_crc=0x{self.initial_crc:0{self.crc_width//4}x}," \
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f" reflect_input={self.reflect_input}," \
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f" reflect_output={self.reflect_output}," \
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f" xor_output=0x{self.xor_output:0{self.crc_width//4}x})"
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class Parameters:
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"""
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Full set of parameters for a CRC computation.
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Contains the settings from :py:class:`Algorithm` and additionally
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``data_width``. Refer to :py:class:`Algorithm` for details of what each
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parameter means and how to construct them.
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From this class, you can directly compute CRCs with the
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:py:meth:`~Parameters.compute` method, or construct a hardware module with
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the :py:meth:`~Parameters.create` method.
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Parameters
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----------
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algorithm : Algorithm
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CRC algorithm to use. Specifies the CRC width, polynomial,
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initial value, whether to reflect the input or output words,
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and any output XOR.
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data_width : int
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Bit width of data words.
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"""
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def __init__(self, algorithm, data_width=8):
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self._crc_width = algorithm.crc_width
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self._polynomial = algorithm.polynomial
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self._initial_crc = algorithm.initial_crc
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self._reflect_input = algorithm.reflect_input
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self._reflect_output = algorithm.reflect_output
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self._xor_output = algorithm.xor_output
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self._data_width = int(data_width)
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if self._data_width <= 0:
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raise ValueError("data_width must be greater than 0")
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@property
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def algorithm(self):
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"""
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Returns an :py:class:`Algorithm` with the CRC settings from this
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instance.
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"""
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return Algorithm(
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crc_width=self._crc_width,
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polynomial=self._polynomial,
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initial_crc=self._initial_crc,
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reflect_input=self._reflect_input,
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reflect_output=self._reflect_output,
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xor_output=self._xor_output)
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def residue(self):
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"""
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Compute the residue value for this CRC, which is the value left in the
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CRC register after processing any valid codeword.
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"""
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# Residue is computed by initialising to (possibly reflected)
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# xor_output, feeding crc_width worth of 0 bits, then taking
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# the (possibly reflected) output without any XOR.
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if self._reflect_output:
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init = self._reflect(self._xor_output, self._crc_width)
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else:
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init = self._xor_output
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algo = self.algorithm
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algo.initial_crc = init
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algo.reflect_input = False
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algo.xor_output = 0
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return algo(data_width=self._crc_width).compute([0])
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def create(self):
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"""
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Returns a ``Processor`` configured with these parameters.
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"""
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return Processor(self)
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def compute(self, data):
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"""
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Computes and returns the CRC of all data words in ``data``.
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Parameters
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----------
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data : iterable of integers
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The CRC is computed over this complete set of data.
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Each item is an integer of bitwidth equal to ``data_width``.
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"""
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# Precompute some constants we use every iteration.
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word_max = (1 << self._data_width) - 1
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top_bit = 1 << (self._crc_width + self._data_width - 1)
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crc_mask = (1 << (self._crc_width + self._data_width)) - 1
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poly_shifted = self._polynomial << self._data_width
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# Implementation notes:
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# We always compute most-significant bit first, which means the
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# polynomial and initial value may be used as-is, and the reflect_in
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# and reflect_out values have their usual sense.
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# However, when computing word-at-a-time and MSbit-first, we must align
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# the input word so its MSbit lines up with the MSbit of the previous
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# CRC value. When the CRC width is smaller than the word width, this
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# would normally truncate data bits.
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# Instead, we shift the initial CRC left by the data width, and the
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# data word left by the crc width, lining up their MSbits no matter
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# the relation between the two widths.
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# The new CRC is then shifted right by the data width before output.
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crc = self._initial_crc << self._data_width
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for word in data:
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if not 0 <= word <= word_max:
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raise ValueError("data word must be between 0 and {}".format(word_max - 1))
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if self._reflect_input:
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word = self._reflect(word, self._data_width)
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crc ^= word << self._crc_width
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for _ in range(self._data_width):
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if crc & top_bit:
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crc = (crc << 1) ^ poly_shifted
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else:
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crc <<= 1
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crc &= crc_mask
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crc >>= self._data_width
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if self._reflect_output:
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crc = self._reflect(crc, self._crc_width)
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crc ^= self._xor_output
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return crc
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@staticmethod
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def _reflect(word, n):
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"""
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Bitwise-reflects an n-bit word ``word``.
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"""
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return int(f"{word:0{n}b}"[::-1], 2)
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def _matrices(self):
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"""
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Computes the F and G matrices for parallel CRC computation, treating
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the CRC as a linear time-invariant system described by the state
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relation x(t+1) = F.x(i) + G.u(i), where x(i) and u(i) are column
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vectors of the bits of the CRC register and input word, F is the n-by-n
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matrix relating the old state to the new state, and G is the n-by-m
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matrix relating the new data to the new state, where n is the CRC
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width and m is the data word width.
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The matrices are ordered least-significant-bit first; in other words
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the first entry, with index (0, 0), corresponds to the effect of the
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least-significant bit of the input on the least-significant bit of the
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output.
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For convenience of implementation, both matrices are returned
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transposed: the first index is the input bit, and the second index is
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the corresponding output bit.
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The matrices are used to select which bits are XORd together to compute
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each bit i of the new state: if F[j][i] is set then bit j of the old
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state is included in the XOR, and if G[j][i] is set then bit j of the
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new data is included.
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These matrices are not affected by ``initial_crc``, ``reflect_input``,
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``reflect_output``, or ``xor_output``.
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"""
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f = []
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g = []
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algo = self.algorithm
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algo.reflect_input = algo.reflect_output = False
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algo.xor_output = 0
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crc = Parameters(algo, self._data_width)
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for i in range(self._crc_width):
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crc._initial_crc = 2 ** i
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w = crc.compute([0])
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f.append([int(x) for x in reversed(f"{w:0{self._crc_width}b}")])
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for i in range(self._data_width):
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crc._initial_crc = 0
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w = crc.compute([2 ** i])
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g.append([int(x) for x in reversed(f"{w:0{self._crc_width}b}")])
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return f, g
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def __repr__(self):
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return f"Parameters({self.algorithm!r}, data_width={self._data_width})"
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class Processor(Elaboratable):
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"""
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Cyclic redundancy check (CRC) processor module.
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This module generates CRCs from an input data stream, which can be used
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to validate an existing CRC or generate a new CRC. It is configured by
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the :py:class:`Parameters` class, which can handle most forms of CRCs.
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Refer to that class's documentation for a description of the parameters.
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The CRC value is updated on any clock cycle where ``valid`` is asserted,
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with the updated value available on the ``crc`` output on the subsequent
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clock cycle. The latency is therefore one clock cycle, and the throughput
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is one data word per clock cycle.
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The CRC is reset to its initial value whenever ``start`` is asserted.
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``start`` and ``valid`` may be asserted on the same clock cycle, in which
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case a new CRC computation is started with the current value of ``data``.
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With ``data_width=1``, a classic bit-serial CRC is implemented for the
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given polynomial in a Galois-type shift register. For larger values of
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``data_width``, a similar architecture computes every new bit of the
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CRC in parallel.
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The ``match_detected`` output may be used to validate data with a trailing
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CRC (also known as a codeword). If the most recently processed word(s) form
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the valid CRC of all the previous data since ``start`` was asserted, the
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CRC register will always take on a fixed value known as the residue. The
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``match_detected`` output indicates whether the CRC register currently
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contains this residue.
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Parameters
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----------
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parameters : Parameters
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CRC parameters.
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Attributes
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----------
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start : Signal(), in
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Assert to indicate the start of a CRC computation, re-initialising
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the CRC register to the initial value. May be asserted simultaneously
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with ``valid`` or by itself.
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data : Signal(data_width), in
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Data word to add to CRC when ``valid`` is asserted.
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valid : Signal(), in
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Assert when ``data`` is valid to add the data word to the CRC.
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crc : Signal(crc_width), out
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Registered CRC output value, updated one clock cycle after ``valid``
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becomes asserted.
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match_detected : Signal(), out
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Asserted if the current CRC value indicates a valid codeword has been
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received.
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"""
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def __init__(self, parameters):
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if not isinstance(parameters, Parameters):
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raise TypeError("Algorithmn parameters must be of type Parameters, "
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"not {!r}"
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.format(parameters))
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self._crc_width = parameters._crc_width
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self._data_width = parameters._data_width
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self._polynomial = parameters._polynomial
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self._initial_crc = Const(parameters._initial_crc, self._crc_width)
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self._reflect_input = parameters._reflect_input
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self._reflect_output = parameters._reflect_output
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self._xor_output = parameters._xor_output
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self._matrix_f, self._matrix_g = parameters._matrices()
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self._residue = parameters.residue()
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self.start = Signal()
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self.data = Signal(self._data_width)
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self.valid = Signal()
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self.crc = Signal(self._crc_width)
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self.match_detected = Signal()
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def elaborate(self, platform):
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m = Module()
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crc_reg = Signal(self._crc_width, reset=self._initial_crc.value)
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data_in = Signal(self._data_width)
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# Optionally bit-reflect input words.
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if self._reflect_input:
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m.d.comb += data_in.eq(self.data[::-1])
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else:
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m.d.comb += data_in.eq(self.data)
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# Optionally bit-reflect and then XOR the output.
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if self._reflect_output:
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m.d.comb += self.crc.eq(crc_reg[::-1] ^ self._xor_output)
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else:
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m.d.comb += self.crc.eq(crc_reg ^ self._xor_output)
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# Compute next CRC state.
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source = Mux(self.start, self._initial_crc, crc_reg)
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with m.If(self.valid):
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for i in range(self._crc_width):
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bit = 0
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for j in range(self._crc_width):
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if self._matrix_f[j][i]:
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bit ^= source[j]
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for j in range(self._data_width):
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if self._matrix_g[j][i]:
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bit ^= data_in[j]
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m.d.sync += crc_reg[i].eq(bit)
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with m.Elif(self.start):
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m.d.sync += crc_reg.eq(self._initial_crc)
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# Check for residue match, indicating a valid codeword.
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if self._reflect_output:
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m.d.comb += self.match_detected.eq(crc_reg[::-1] == self._residue)
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else:
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m.d.comb += self.match_detected.eq(crc_reg == self._residue)
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return m
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# Imported after Algorithm is defined to prevent circular imports.
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from . import catalog
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918
amaranth/lib/crc/catalog.py
Normal file
918
amaranth/lib/crc/catalog.py
Normal file
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@ -0,0 +1,918 @@
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"""
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This module contains a catalog of predefined CRC algorithms.
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All entries are from `reveng`_, accessed on 2023-05-25.
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.. _reveng: https://reveng.sourceforge.io/crc-catalogue/all.htm
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To use an entry, call it with an optional ``data_width`` which defaults
|
||||
to 8. For example:
|
||||
|
||||
.. code-block::
|
||||
|
||||
crc8 = m.submodules.crc8 = crc.catalog.CRC8_AUTOSAR().create()
|
||||
|
||||
"""
|
||||
|
||||
from . import Algorithm
|
||||
|
||||
# Note: The trailing `#:` gives Sphinx an empty documentation string for each
|
||||
# constant, allowing it to be documented with `automodule` (which otherwise
|
||||
# ignores undocumented module constants) and also preventing it from using
|
||||
# the Algorithm docstring if otherwise forced to document the constants.
|
||||
|
||||
CRC3_GSM = Algorithm(
|
||||
crc_width=3,
|
||||
polynomial=0x3,
|
||||
initial_crc=0x0,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x7) #:
|
||||
|
||||
CRC3_ROHC = Algorithm(
|
||||
crc_width=3,
|
||||
polynomial=0x3,
|
||||
initial_crc=0x7,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0) #:
|
||||
|
||||
CRC4_G_704 = CRC4_ITU = Algorithm(
|
||||
crc_width=4,
|
||||
polynomial=0x3,
|
||||
initial_crc=0x0,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0) #:
|
||||
|
||||
CRC4_INTERLAKEN = Algorithm(
|
||||
crc_width=4,
|
||||
polynomial=0x3,
|
||||
initial_crc=0xf,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xf) #:
|
||||
|
||||
CRC5_EPC_C1G2 = CRC5_EPC = Algorithm(
|
||||
crc_width=5,
|
||||
polynomial=0x09,
|
||||
initial_crc=0x09,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC5_G_704 = CRC5_ITU = Algorithm(
|
||||
crc_width=5,
|
||||
polynomial=0x15,
|
||||
initial_crc=0x00,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC5_USB = Algorithm(
|
||||
crc_width=5,
|
||||
polynomial=0x05,
|
||||
initial_crc=0x1f,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x1f) #:
|
||||
|
||||
CRC6_CDMA2000_A = Algorithm(
|
||||
crc_width=6,
|
||||
polynomial=0x27,
|
||||
initial_crc=0x3f,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC6_CDMA2000_B = Algorithm(
|
||||
crc_width=6,
|
||||
polynomial=0x07,
|
||||
initial_crc=0x3f,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC6_DARC = Algorithm(
|
||||
crc_width=6,
|
||||
polynomial=0x19,
|
||||
initial_crc=0x00,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC6_G_704 = CRC6_ITU = Algorithm(
|
||||
crc_width=6,
|
||||
polynomial=0x03,
|
||||
initial_crc=0x00,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC6_GSM = Algorithm(
|
||||
crc_width=6,
|
||||
polynomial=0x2f,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x3f) #:
|
||||
|
||||
CRC7_MMC = Algorithm(
|
||||
crc_width=7,
|
||||
polynomial=0x09,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC7_ROHC = Algorithm(
|
||||
crc_width=7,
|
||||
polynomial=0x4f,
|
||||
initial_crc=0x7f,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC7_UMTS = Algorithm(
|
||||
crc_width=7,
|
||||
polynomial=0x45,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_AUTOSAR = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x2f,
|
||||
initial_crc=0xff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xff) #:
|
||||
|
||||
CRC8_BLUETOOTH = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0xa7,
|
||||
initial_crc=0x00,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_CDMA2000 = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x9b,
|
||||
initial_crc=0xff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_DARC = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x39,
|
||||
initial_crc=0x00,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_DVB_S2 = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0xd5,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_GSM_A = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x1d,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_GSM_B = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x49,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xff) #:
|
||||
|
||||
CRC8_HITAG = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x1d,
|
||||
initial_crc=0xff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_I_432_1 = CRC8_ITU = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x07,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x55) #:
|
||||
|
||||
CRC8_I_CODE = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x1d,
|
||||
initial_crc=0xfd,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_LTE = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x9b,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_MAXIM_DOW = CRC8_MAXIM = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x31,
|
||||
initial_crc=0x00,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_MIFARE_MAD = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x1d,
|
||||
initial_crc=0xc7,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_NRSC_5 = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x31,
|
||||
initial_crc=0xff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_OPENSAFETY = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x2f,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_ROHC = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x07,
|
||||
initial_crc=0xff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_SAE_J1850 = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x1d,
|
||||
initial_crc=0xff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xff) #:
|
||||
|
||||
CRC8_SMBUS = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x07,
|
||||
initial_crc=0x00,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_TECH_3250 = CRC8_AES = CRC8_ETU = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x1d,
|
||||
initial_crc=0xff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC8_WCDMA = Algorithm(
|
||||
crc_width=8,
|
||||
polynomial=0x9b,
|
||||
initial_crc=0x00,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00) #:
|
||||
|
||||
CRC10_ATM = CRC10_I_610 = Algorithm(
|
||||
crc_width=10,
|
||||
polynomial=0x233,
|
||||
initial_crc=0x000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000) #:
|
||||
|
||||
CRC10_CDMA2000 = Algorithm(
|
||||
crc_width=10,
|
||||
polynomial=0x3d9,
|
||||
initial_crc=0x3ff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000) #:
|
||||
|
||||
CRC10_GSM = Algorithm(
|
||||
crc_width=10,
|
||||
polynomial=0x175,
|
||||
initial_crc=0x000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x3ff) #:
|
||||
|
||||
CRC11_FLEXRAY = Algorithm(
|
||||
crc_width=11,
|
||||
polynomial=0x385,
|
||||
initial_crc=0x01a,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000) #:
|
||||
|
||||
CRC11_UMTS = Algorithm(
|
||||
crc_width=11,
|
||||
polynomial=0x307,
|
||||
initial_crc=0x000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000) #:
|
||||
|
||||
CRC12_CDMA2000 = Algorithm(
|
||||
crc_width=12,
|
||||
polynomial=0xf13,
|
||||
initial_crc=0xfff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000) #:
|
||||
|
||||
CRC12_DECT = Algorithm(
|
||||
crc_width=12,
|
||||
polynomial=0x80f,
|
||||
initial_crc=0x000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000) #:
|
||||
|
||||
CRC12_GSM = Algorithm(
|
||||
crc_width=12,
|
||||
polynomial=0xd31,
|
||||
initial_crc=0x000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xfff) #:
|
||||
|
||||
CRC12_UMTS = CRC12_3GPP = Algorithm(
|
||||
crc_width=12,
|
||||
polynomial=0x80f,
|
||||
initial_crc=0x000,
|
||||
reflect_input=False,
|
||||
reflect_output=True,
|
||||
xor_output=0x000) #:
|
||||
|
||||
CRC13_BBC = Algorithm(
|
||||
crc_width=13,
|
||||
polynomial=0x1cf5,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC14_DARC = Algorithm(
|
||||
crc_width=14,
|
||||
polynomial=0x0805,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC14_GSM = Algorithm(
|
||||
crc_width=14,
|
||||
polynomial=0x202d,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x3fff) #:
|
||||
|
||||
CRC15_CAN = Algorithm(
|
||||
crc_width=15,
|
||||
polynomial=0x4599,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC15_MPT1327 = Algorithm(
|
||||
crc_width=15,
|
||||
polynomial=0x6815,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0001) #:
|
||||
|
||||
CRC16_ARC = CRC16_IBM = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x8005,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_CDMA2000 = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0xc867,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_CMS = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x8005,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_DDS_110 = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x8005,
|
||||
initial_crc=0x800d,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_DECT_R = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x0589,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0001) #:
|
||||
|
||||
CRC16_DECT_X = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x0589,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_DNP = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x3d65,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffff) #:
|
||||
|
||||
CRC16_EN_13757 = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x3d65,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffff) #:
|
||||
|
||||
CRC16_GENIBUS = CRC16_DARC = CRC16_EPC = CRC16_EPC_C1G2 = CRC16_I_CODE = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffff) #:
|
||||
|
||||
CRC16_GSM = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffff) #:
|
||||
|
||||
CRC16_IBM_3740 = CRC16_AUTOSAR = CRC16_CCITT_FALSE = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_IBM_SDLC = CRC16_ISO_HDLC = CRC16_ISO_IEC_14443_3_B = CRC16_X25 = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffff) #:
|
||||
|
||||
CRC16_ISO_IEC_14443_3_A = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0xc6c6,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_KERMIT = CRC16_BLUETOOTH = CRC16_CCITT = CRC16_CCITT_TRUE = CRC16_V_41_LSB = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_LJ1200 = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x6f63,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_M17 = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x5935,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_MAXIM_DOW = CRC16_MAXIM = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x8005,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffff) #:
|
||||
|
||||
CRC16_MCRF4XX = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_MODBUS = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x8005,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_NRSC_5 = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x080b,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_OPENSAFETY_A = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x5935,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_OPENSAFETY_B = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x755b,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_PROFIBUS = CRC16_IEC_61158_2 = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1dcf,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffff) #:
|
||||
|
||||
CRC16_RIELLO = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0xb2aa,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_SPI_FUJITSU = CRC16_AUG_CCITT = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0x1d0f,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_T10_DIF = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x8bb7,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_TELEDISK = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0xa097,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_TMS37157 = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0x89ec,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_UMTS = CRC16_BUYPASS = CRC16_VERIFONE = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x8005,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC16_USB = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x8005,
|
||||
initial_crc=0xffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffff) #:
|
||||
|
||||
CRC16_XMODEM = CRC16_ACORN = CRC16_LTE = CRC16_V_41_MSB = CRC16_ZMODEM = Algorithm(
|
||||
crc_width=16,
|
||||
polynomial=0x1021,
|
||||
initial_crc=0x0000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000) #:
|
||||
|
||||
CRC17_CAN_FD = Algorithm(
|
||||
crc_width=17,
|
||||
polynomial=0x1685b,
|
||||
initial_crc=0x00000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00000) #:
|
||||
|
||||
CRC21_CAN_FD = Algorithm(
|
||||
crc_width=21,
|
||||
polynomial=0x102899,
|
||||
initial_crc=0x000000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000000) #:
|
||||
|
||||
CRC24_BLE = Algorithm(
|
||||
crc_width=24,
|
||||
polynomial=0x00065b,
|
||||
initial_crc=0x555555,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x000000) #:
|
||||
|
||||
CRC24_FLEXRAY_A = Algorithm(
|
||||
crc_width=24,
|
||||
polynomial=0x5d6dcb,
|
||||
initial_crc=0xfedcba,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000000) #:
|
||||
|
||||
CRC24_FLEXRAY_B = Algorithm(
|
||||
crc_width=24,
|
||||
polynomial=0x5d6dcb,
|
||||
initial_crc=0xabcdef,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000000) #:
|
||||
|
||||
CRC24_INTERLAKEN = Algorithm(
|
||||
crc_width=24,
|
||||
polynomial=0x328b63,
|
||||
initial_crc=0xffffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffffff) #:
|
||||
|
||||
CRC24_LTE_A = Algorithm(
|
||||
crc_width=24,
|
||||
polynomial=0x864cfb,
|
||||
initial_crc=0x000000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000000) #:
|
||||
|
||||
CRC24_LTE_B = Algorithm(
|
||||
crc_width=24,
|
||||
polynomial=0x800063,
|
||||
initial_crc=0x000000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000000) #:
|
||||
|
||||
CRC24_OPENPGP = Algorithm(
|
||||
crc_width=24,
|
||||
polynomial=0x864cfb,
|
||||
initial_crc=0xb704ce,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x000000) #:
|
||||
|
||||
CRC24_OS_9 = Algorithm(
|
||||
crc_width=24,
|
||||
polynomial=0x800063,
|
||||
initial_crc=0xffffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffffff) #:
|
||||
|
||||
CRC30_CDMA = Algorithm(
|
||||
crc_width=30,
|
||||
polynomial=0x2030b9c7,
|
||||
initial_crc=0x3fffffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x3fffffff) #:
|
||||
|
||||
CRC31_PHILIPS = Algorithm(
|
||||
crc_width=31,
|
||||
polynomial=0x04c11db7,
|
||||
initial_crc=0x7fffffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x7fffffff) #:
|
||||
|
||||
CRC32_AIXM = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x814141ab,
|
||||
initial_crc=0x00000000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00000000) #:
|
||||
|
||||
CRC32_AUTOSAR = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0xf4acfb13,
|
||||
initial_crc=0xffffffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffffffff) #:
|
||||
|
||||
CRC32_BASE91_D = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0xa833982b,
|
||||
initial_crc=0xffffffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffffffff) #:
|
||||
|
||||
CRC32_BZIP2 = CRC32_AAL5 = CRC32_DECT_B = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x04c11db7,
|
||||
initial_crc=0xffffffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffffffff) #:
|
||||
|
||||
CRC32_CD_ROM_EDC = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x8001801b,
|
||||
initial_crc=0x00000000,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00000000) #:
|
||||
|
||||
CRC32_CKSUM = CRC32_POSIX = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x04c11db7,
|
||||
initial_crc=0x00000000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffffffff) #:
|
||||
|
||||
CRC32_ISCSI = CRC32_BASE91_C = CRC32_CASTAGNOLI = CRC32_INTERLAKEN = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x1edc6f41,
|
||||
initial_crc=0xffffffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffffffff) #:
|
||||
|
||||
CRC32_ISO_HDLC = CRC32_ADCCP = CRC32_V_42 = CRC32_XZ = CRC32_PKZIP = CRC32_ETHERNET = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x04c11db7,
|
||||
initial_crc=0xffffffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffffffff) #:
|
||||
|
||||
CRC32_JAMCRC = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x04c11db7,
|
||||
initial_crc=0xffffffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00000000) #:
|
||||
|
||||
CRC32_MEF = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x741b8cd7,
|
||||
initial_crc=0xffffffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x00000000) #:
|
||||
|
||||
CRC32_MPEG_2 = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x04c11db7,
|
||||
initial_crc=0xffffffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00000000) #:
|
||||
|
||||
CRC32_XFER = Algorithm(
|
||||
crc_width=32,
|
||||
polynomial=0x000000af,
|
||||
initial_crc=0x00000000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x00000000) #:
|
||||
|
||||
CRC40_GSM = Algorithm(
|
||||
crc_width=40,
|
||||
polynomial=0x0004820009,
|
||||
initial_crc=0x0000000000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffffffffff) #:
|
||||
|
||||
CRC64_ECMA_182 = Algorithm(
|
||||
crc_width=64,
|
||||
polynomial=0x42f0e1eba9ea3693,
|
||||
initial_crc=0x0000000000000000,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0x0000000000000000) #:
|
||||
|
||||
CRC64_GO_ISO = Algorithm(
|
||||
crc_width=64,
|
||||
polynomial=0x000000000000001b,
|
||||
initial_crc=0xffffffffffffffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffffffffffffffff) #:
|
||||
|
||||
CRC64_MS = Algorithm(
|
||||
crc_width=64,
|
||||
polynomial=0x259c84cba6426349,
|
||||
initial_crc=0xffffffffffffffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000000000000000) #:
|
||||
|
||||
CRC64_REDIS = Algorithm(
|
||||
crc_width=64,
|
||||
polynomial=0xad93d23594c935a9,
|
||||
initial_crc=0x0000000000000000,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x0000000000000000) #:
|
||||
|
||||
CRC64_WE = Algorithm(
|
||||
crc_width=64,
|
||||
polynomial=0x42f0e1eba9ea3693,
|
||||
initial_crc=0xffffffffffffffff,
|
||||
reflect_input=False,
|
||||
reflect_output=False,
|
||||
xor_output=0xffffffffffffffff) #:
|
||||
|
||||
CRC64_XZ = CRC64_ECMA = Algorithm(
|
||||
crc_width=64,
|
||||
polynomial=0x42f0e1eba9ea3693,
|
||||
initial_crc=0xffffffffffffffff,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0xffffffffffffffff) #:
|
||||
|
||||
CRC82_DARC = Algorithm(
|
||||
crc_width=82,
|
||||
polynomial=0x0308c0111011401440411,
|
||||
initial_crc=0x000000000000000000000,
|
||||
reflect_input=True,
|
||||
reflect_output=True,
|
||||
xor_output=0x000000000000000000000) #:
|
||||
Loading…
Add table
Add a link
Reference in a new issue