hdl.{ast,dsl}: add Signal.enum; coerce Enum to Value; accept Enum patterns.
Fixes #207.
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@ -30,6 +30,21 @@ class DUID:
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DUID.__next_uid += 1
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def _enum_shape(enum_type):
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min_value = min(member.value for member in enum_type)
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max_value = max(member.value for member in enum_type)
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if not isinstance(min_value, int) or not isinstance(max_value, int):
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raise TypeError("Only enumerations with integer values can be converted to nMigen values")
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sign = min_value < 0 or max_value < 0
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bits = max(bits_for(min_value, sign), bits_for(max_value, sign))
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return (bits, sign)
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def _enum_to_bits(enum_value):
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bits, sign = _enum_shape(type(enum_value))
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return format(enum_value.value & ((1 << bits) - 1), "b").rjust(bits, "0")
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class Value(metaclass=ABCMeta):
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@staticmethod
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def wrap(obj):
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@ -39,6 +54,8 @@ class Value(metaclass=ABCMeta):
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return obj
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elif isinstance(obj, (bool, int)):
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return Const(obj)
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elif isinstance(obj, Enum):
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return Const(obj.value, _enum_shape(type(obj)))
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else:
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raise TypeError("Object '{!r}' is not an nMigen value".format(obj))
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@ -240,6 +257,10 @@ class Value(metaclass=ABCMeta):
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"""
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matches = []
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for pattern in patterns:
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if not isinstance(pattern, (int, str, Enum)):
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raise SyntaxError("Match pattern must be an integer, a string, or an enumeration, "
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"not {!r}"
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.format(pattern))
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if isinstance(pattern, str) and any(bit not in "01-" for bit in pattern):
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raise SyntaxError("Match pattern '{}' must consist of 0, 1, and - (don't care) "
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"bits"
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@ -248,9 +269,6 @@ class Value(metaclass=ABCMeta):
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raise SyntaxError("Match pattern '{}' must have the same width as match value "
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"(which is {})"
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.format(pattern, len(self)))
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if not isinstance(pattern, (int, str)):
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raise SyntaxError("Match pattern must be an integer or a string, not {}"
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.format(pattern))
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if isinstance(pattern, int) and bits_for(pattern) > len(self):
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warnings.warn("Match pattern '{:b}' is wider than match value "
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"(which has width {}); comparison will never be true"
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@ -259,7 +277,9 @@ class Value(metaclass=ABCMeta):
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continue
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if isinstance(pattern, int):
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matches.append(self == pattern)
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elif isinstance(pattern, str):
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elif isinstance(pattern, (str, Enum)):
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if isinstance(pattern, Enum):
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pattern = _enum_to_bits(pattern)
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mask = int(pattern.replace("0", "1").replace("-", "0"), 2)
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pattern = int(pattern.replace("-", "0"), 2)
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matches.append((self & mask) == pattern)
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@ -784,6 +804,19 @@ class Signal(Value, DUID):
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bits_for(value_range.stop - value_range.step, signed))
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return cls((nbits, signed), src_loc_at=1 + src_loc_at, **kwargs)
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@classmethod
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def enum(cls, enum_type, *, src_loc_at=0, **kwargs):
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"""Create Signal that can represent a given enumeration.
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Parameters
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----------
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enum : type (inheriting from :class:`enum.Enum`)
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Enumeration to base this Signal on.
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"""
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if not issubclass(enum_type, Enum):
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raise TypeError("Type {!r} is not an enumeration")
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return cls(_enum_shape(enum_type), src_loc_at=1 + src_loc_at, decoder=enum_type, **kwargs)
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@classmethod
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def like(cls, other, *, name=None, name_suffix=None, src_loc_at=0, **kwargs):
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"""Create Signal based on another.
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@ -1230,6 +1263,8 @@ class Switch(Statement):
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key = "{:0{}b}".format(key, len(self.test))
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elif isinstance(key, str):
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pass
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elif isinstance(key, Enum):
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key = _enum_to_bits(key)
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else:
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raise TypeError("Object '{!r}' cannot be used as a switch key"
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.format(key))
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@ -1,6 +1,7 @@
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from collections import OrderedDict, namedtuple
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from collections.abc import Iterable
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from contextlib import contextmanager
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from enum import Enum
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import warnings
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from ..tools import flatten, bits_for, deprecated
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@ -264,6 +265,10 @@ class Module(_ModuleBuilderRoot, Elaboratable):
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switch_data = self._get_ctrl("Switch")
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new_patterns = ()
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for pattern in patterns:
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if not isinstance(pattern, (int, str, Enum)):
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raise SyntaxError("Case pattern must be an integer, a string, or an enumeration, "
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"not {!r}"
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.format(pattern))
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if isinstance(pattern, str) and any(bit not in "01-" for bit in pattern):
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raise SyntaxError("Case pattern '{}' must consist of 0, 1, and - (don't care) bits"
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.format(pattern))
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@ -271,9 +276,6 @@ class Module(_ModuleBuilderRoot, Elaboratable):
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raise SyntaxError("Case pattern '{}' must have the same width as switch value "
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"(which is {})"
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.format(pattern, len(switch_data["test"])))
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if not isinstance(pattern, (int, str)):
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raise SyntaxError("Case pattern must be an integer or a string, not {}"
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.format(pattern))
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if isinstance(pattern, int) and bits_for(pattern) > len(switch_data["test"]):
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warnings.warn("Case pattern '{:b}' is wider than switch value "
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"(which has width {}); comparison will never be true"
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@ -5,6 +5,23 @@ from ..hdl.ast import *
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from .tools import *
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class UnsignedEnum(Enum):
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FOO = 1
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BAR = 2
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BAZ = 3
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class SignedEnum(Enum):
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FOO = -1
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BAR = 0
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BAZ = +1
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class StringEnum(Enum):
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FOO = "a"
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BAR = "b"
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class ValueTestCase(FHDLTestCase):
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def test_wrap(self):
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self.assertIsInstance(Value.wrap(0), Const)
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@ -15,6 +32,19 @@ class ValueTestCase(FHDLTestCase):
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msg="Object ''str'' is not an nMigen value"):
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Value.wrap("str")
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def test_wrap_enum(self):
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e1 = Value.wrap(UnsignedEnum.FOO)
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self.assertIsInstance(e1, Const)
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self.assertEqual(e1.shape(), (2, False))
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e2 = Value.wrap(SignedEnum.FOO)
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self.assertIsInstance(e2, Const)
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self.assertEqual(e2.shape(), (2, True))
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def test_wrap_enum_wrong(self):
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with self.assertRaises(TypeError,
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msg="Only enumerations with integer values can be converted to nMigen values"):
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Value.wrap(StringEnum.FOO)
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def test_bool(self):
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with self.assertRaises(TypeError,
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msg="Attempted to convert nMigen value to boolean"):
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@ -276,6 +306,12 @@ class OperatorTestCase(FHDLTestCase):
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(== (& (sig s) (const 4'd12)) (const 4'd8))
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""")
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def test_matches_enum(self):
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s = Signal.enum(SignedEnum)
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self.assertRepr(s.matches(SignedEnum.FOO), """
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(== (& (sig s) (const 2'd3)) (const 2'd3))
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""")
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def test_matches_width_wrong(self):
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s = Signal(4)
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with self.assertRaises(SyntaxError,
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@ -295,7 +331,7 @@ class OperatorTestCase(FHDLTestCase):
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def test_matches_pattern_wrong(self):
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s = Signal(4)
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with self.assertRaises(SyntaxError,
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msg="Match pattern must be an integer or a string, not 1.0"):
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msg="Match pattern must be an integer, a string, or an enumeration, not 1.0"):
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s.matches(1.0)
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def test_hash(self):
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@ -605,6 +641,13 @@ class SignalTestCase(FHDLTestCase):
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self.assertEqual(s.decoder(1), "RED/1")
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self.assertEqual(s.decoder(3), "3")
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def test_enum(self):
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s1 = Signal.enum(UnsignedEnum)
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self.assertEqual(s1.shape(), (2, False))
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s2 = Signal.enum(SignedEnum)
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self.assertEqual(s2.shape(), (2, True))
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self.assertEqual(s2.decoder(SignedEnum.FOO), "FOO/-1")
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class ClockSignalTestCase(FHDLTestCase):
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def test_domain(self):
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@ -1,4 +1,5 @@
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from collections import OrderedDict
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from enum import Enum
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from ..hdl.ast import *
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from ..hdl.cd import *
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@ -355,6 +356,23 @@ class DSLTestCase(FHDLTestCase):
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)
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""")
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def test_Switch_enum(self):
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class Color(Enum):
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RED = 1
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BLUE = 2
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m = Module()
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se = Signal.enum(Color)
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with m.Switch(se):
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with m.Case(Color.RED):
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m.d.comb += self.c1.eq(1)
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self.assertRepr(m._statements, """
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(
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(switch (sig se)
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(case 01 (eq (sig c1) (const 1'd1)))
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)
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)
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""")
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def test_Case_width_wrong(self):
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m = Module()
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with m.Switch(self.w1):
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@ -385,7 +403,7 @@ class DSLTestCase(FHDLTestCase):
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m = Module()
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with m.Switch(self.w1):
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with self.assertRaises(SyntaxError,
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msg="Case pattern must be an integer or a string, not 1.0"):
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msg="Case pattern must be an integer, a string, or an enumeration, not 1.0"):
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with m.Case(1.0):
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pass
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