hdl.ir: rename .get_fragment() to .elaborate().

Closes #9.

nmigen/lib/cdc.py

@@ -14,7 +14,7 @@ class MultiReg:
                              reset=reset, reset_less=True, attrs={"no_retiming": True})
                       for i in range(n)]
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         if hasattr(platform, "get_multi_reg"):
             return platform.get_multi_reg(self)
 
@@ -22,4 +22,4 @@ class MultiReg:
         for i, o in zip((self.i, *self._regs), self._regs):
             m.d[self.odomain] += o.eq(i)
         m.d.comb += self.o.eq(self._regs[-1])
-        return m.lower(platform)
+        return m

nmigen/lib/coding.py

@@ -37,7 +37,7 @@ class Encoder:
         self.o = Signal(max=max(2, width))
         self.n = Signal()
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         m = Module()
         with m.Switch(self.i):
             for j in range(self.width):
@@ -45,7 +45,7 @@ class Encoder:
                     m.d.comb += self.o.eq(j)
             with m.Case():
                 m.d.comb += self.n.eq(1)
-        return m.lower(platform)
+        return m
 
 
 class PriorityEncoder:
@@ -76,13 +76,13 @@ class PriorityEncoder:
         self.o = Signal(max=max(2, width))
         self.n = Signal()
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         m = Module()
         for j in reversed(range(self.width)):
             with m.If(self.i[j]):
                 m.d.comb += self.o.eq(j)
         m.d.comb += self.n.eq(self.i == 0)
-        return m.lower(platform)
+        return m
 
 
 class Decoder:
@@ -112,7 +112,7 @@ class Decoder:
         self.n = Signal()
         self.o = Signal(width)
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         m = Module()
         with m.Switch(self.i):
             for j in range(len(self.o)):
@@ -120,7 +120,7 @@ class Decoder:
                     m.d.comb += self.o.eq(1 << j)
         with m.If(self.n):
             m.d.comb += self.o.eq(0)
-        return m.lower(platform)
+        return m
 
 
 class PriorityDecoder(Decoder):
@@ -151,10 +151,10 @@ class GrayEncoder:
         self.i = Signal(width)
         self.o = Signal(width)
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         m = Module()
         m.d.comb += self.o.eq(self.i ^ self.i[1:])
-        return m.lower(platform)
+        return m
 
 
 class GrayDecoder:
@@ -178,9 +178,9 @@ class GrayDecoder:
         self.i = Signal(width)
         self.o = Signal(width)
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         m = Module()
         m.d.comb += self.o[-1].eq(self.i[-1])
         for i in reversed(range(self.width - 1)):
             m.d.comb += self.o[i].eq(self.o[i + 1] ^ self.i[i])
-        return m.lower(platform)
+        return m

nmigen/lib/fifo.py

@@ -138,7 +138,7 @@ class SyncFIFO(FIFOInterface):
         self.level   = Signal(max=depth + 1)
         self.replace = Signal()
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         m = Module()
         m.d.comb += [
             self.writable.eq(self.level != self.depth),
@@ -206,7 +206,7 @@ class SyncFIFO(FIFOInterface):
                 with m.If(produce < consume):
                     m.d.comb += Assert(self.level == (self.depth + produce - consume))
 
-        return m.lower(platform)
+        return m
 
 
 class SyncFIFOBuffered(FIFOInterface):
@@ -237,7 +237,7 @@ class SyncFIFOBuffered(FIFOInterface):
 
         self.level = Signal(max=depth + 1)
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         m = Module()
 
         # Effectively, this queue treats the output register of the non-FWFT inner queue as
@@ -262,7 +262,7 @@ class SyncFIFOBuffered(FIFOInterface):
 
         m.d.comb += self.level.eq(fifo.level + self.readable)
 
-        return m.lower(platform)
+        return m
 
 
 class AsyncFIFO(FIFOInterface):
@@ -290,7 +290,7 @@ class AsyncFIFO(FIFOInterface):
         except ValueError as e:
             raise ValueError("AsyncFIFO only supports power-of-2 depths") from e
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         # The design of this queue is the "style #2" from Clifford E. Cummings' paper "Simulation
         # and Synthesis Techniques for Asynchronous FIFO Design":
         # http://www.sunburst-design.com/papers/CummingsSNUG2002SJ_FIFO1.pdf
@@ -347,7 +347,7 @@ class AsyncFIFO(FIFOInterface):
             self.dout.eq(rdport.data),
         ]
 
-        return m.lower(platform)
+        return m
 
 
 class AsyncFIFOBuffered(FIFOInterface):
@@ -373,7 +373,7 @@ class AsyncFIFOBuffered(FIFOInterface):
     def __init__(self, width, depth):
         super().__init__(width, depth, fwft=True)
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         m = Module()
         m.submodules.unbuffered = fifo = AsyncFIFO(self.width, self.depth - 1)
 
@@ -391,4 +391,4 @@ class AsyncFIFOBuffered(FIFOInterface):
             m.d.comb += \
                 fifo.re.eq(1)
 
-        return m.lower(platform)
+        return m

nmigen/lib/io.py

@@ -17,7 +17,7 @@ class TSTriple:
     def __len__(self):
         return len(self.o)
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         return Fragment()
 
     def get_tristate(self, io):
@@ -29,7 +29,7 @@ class Tristate:
         self.triple = triple
         self.io     = io
 
-    def get_fragment(self, platform):
+    def elaborate(self, platform):
         if hasattr(platform, "get_tristate"):
             return platform.get_tristate(self.triple, self.io)
 
@@ -42,6 +42,6 @@ class Tristate:
             o_Y=self.io,
         )
 
-        f = m.lower(platform)
+        f = m.elaborate(platform)
         f.flatten = True
         return f