usb-tools/amaranth
1
0
Fork 0
Code Issues Pull requests Actions Packages Projects Releases Wiki Activity

compat: fix confusing naming for memory port address signal.

Browse source
This commit is contained in:
whitequark 2018-12-22 00:53:05 +00:00
parent f6772759c8
commit 5361b4c22b
1 changed files with 1 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
nmigen/compat/fhdl/specials.py
View file

@ -64,6 +64,7 @@ class CompatMemory(NativeMemory):
we_granularity = None we_granularity = None
assert mode != NO_CHANGE assert mode != NO_CHANGE
rdport = self.read_port(synchronous=not async_read, transparent=mode == WRITE_FIRST) rdport = self.read_port(synchronous=not async_read, transparent=mode == WRITE_FIRST)
rdport.addr.name = "{}_addr".format(self.name)
adr = rdport.addr adr = rdport.addr
dat_r = rdport.data dat_r = rdport.data
if write_capable: if write_capable: