build.plat: strip internal attributes from Verilog output.

Although useful for debugging, most external tools often complain
about such attributes (with notable exception of Vivado). As such,
it is better to emit Verilog with these attributes into a separate
file such as `design.debug.v` and only emit the attributes that were
explicitly placed by the user to `design.v`.

This still leaves the (*init*) attribute. See #220 for details.

nmigen/build/plat.py

@@ -272,12 +272,16 @@ class TemplatedPlatform(Platform):
         # and to incorporate the nMigen version into generated code.
         autogenerated = "Automatically generated by nMigen {}. Do not edit.".format(__version__)
 
-        name_map = None
-        def emit_design(backend):
-            nonlocal name_map
-            backend_mod = {"rtlil": rtlil, "verilog": verilog}[backend]
-            design_text, name_map = backend_mod.convert_fragment(fragment, name=name)
-            return design_text
+        rtlil_text, name_map = rtlil.convert_fragment(fragment, name=name)
+
+        def emit_rtlil():
+            return rtlil_text
+
+        def emit_verilog():
+            return verilog._convert_rtlil_text(rtlil_text, strip_internal_attrs=True)
+
+        def emit_debug_verilog():
+            return verilog._convert_rtlil_text(rtlil_text, strip_internal_attrs=False)
 
         def emit_commands(format):
             commands = []
@@ -341,7 +345,9 @@ class TemplatedPlatform(Platform):
             return compiled.render({
                 "name": name,
                 "platform": self,
-                "emit_design": emit_design,
+                "emit_rtlil": emit_rtlil,
+                "emit_verilog": emit_verilog,
+                "emit_debug_verilog": emit_debug_verilog,
                 "emit_commands": emit_commands,
                 "get_tool": get_tool,
                 "get_override": get_override,