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examples/uart: acknowledging RX data should deassert RX ready.

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Ben Newhouse 2021-12-16 08:31:32 -05:00 committed by GitHub
parent 0169d47365
commit 55756e9568
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1 changed files with 6 additions and 0 deletions
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6
examples/basic/uart.py
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@ -71,6 +71,8 @@ class UART(Elaboratable):
] ]
with m.Else(): with m.Else():
m.d.sync += self.rx_ovf.eq(1) m.d.sync += self.rx_ovf.eq(1)
with m.If(self.rx_ack):
m.d.sync += self.rx_rdy.eq(0)
with m.Else(): with m.Else():
with m.If(rx_phase != 0): with m.If(rx_phase != 0):
m.d.sync += rx_phase.eq(rx_phase - 1) m.d.sync += rx_phase.eq(rx_phase - 1)
@ -135,6 +137,10 @@ if __name__ == "__main__":
yield uart.rx_ack.eq(1) yield uart.rx_ack.eq(1)
yield yield
yield uart.rx_ack.eq(0)
yield
assert not (yield uart.rx_rdy)
sim.add_sync_process(transmit_proc) sim.add_sync_process(transmit_proc)
with sim.write_vcd("uart.vcd", "uart.gtkw"): with sim.write_vcd("uart.vcd", "uart.gtkw"):