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lib.io: fix Pin.eq to work when FlippedInterface is involved.

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This was broken by #915, when platform started handing out
`FlippedInterface` versions of `Pin`.
This commit is contained in:
Wanda 2023-11-26 19:13:15 +01:00 committed by Catherine
parent 74e613b49d
commit 57748a66a6
2 changed files with 14 additions and 2 deletions
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7
amaranth/lib/io.py
View file

@ -4,7 +4,7 @@ from .. import *
with warnings.catch_warnings(): with warnings.catch_warnings():
warnings.filterwarnings(action="ignore", category=DeprecationWarning) warnings.filterwarnings(action="ignore", category=DeprecationWarning)
from ..hdl.rec import * from ..hdl.rec import *
from ..lib.wiring import In, Out, Signature from ..lib.wiring import In, Out, Signature, flipped, FlippedInterface
__all__ = ["pin_layout", "Pin"] __all__ = ["pin_layout", "Pin"]
@ -135,4 +135,7 @@ class Pin(Record):
first_field, _, _ = next(iter(Pin(1, dir="o").layout)) first_field, _, _ = next(iter(Pin(1, dir="o").layout))
warnings.warn(f"`pin.eq(...)` is deprecated; use `pin.{first_field}.eq(...)` here", warnings.warn(f"`pin.eq(...)` is deprecated; use `pin.{first_field}.eq(...)` here",
DeprecationWarning, stacklevel=2) DeprecationWarning, stacklevel=2)
return super().eq(other) if isinstance(self, FlippedInterface):
return Record.eq(flipped(self), other)
else:
return Record.eq(self, other)

9
tests/test_build_res.py
View file

@ -315,3 +315,12 @@ class ResourceManagerTestCase(FHDLTestCase):
(r"^Cannot add clock constraint on \(sig clk100_0__i\), which is already " (r"^Cannot add clock constraint on \(sig clk100_0__i\), which is already "
r"constrained to 100000000\.0 Hz$")): r"constrained to 100000000\.0 Hz$")):
self.cm.add_clock_constraint(clk100.i, 1e6) self.cm.add_clock_constraint(clk100.i, 1e6)
def test_eq_deprecation(self):
user_led = self.cm.request("user_led", 0)
m = Module()
with self.assertWarns(DeprecationWarning):
m.d.sync += user_led.eq(1)
p = Pin(4, "o")
with self.assertWarns(DeprecationWarning):
m.d.sync += p.eq(1)