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sim.pysim: write the next, not curr signal value to the VCD file

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This is a temporary fix for #429.
This commit is contained in:
Jacob Lifshay 2020-07-12 19:10:01 -07:00 committed by GitHub
parent 0a90aa1b17
commit 58f1d4bcb6
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1 changed files with 1 additions and 1 deletions
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2
nmigen/sim/pysim.py
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@ -349,7 +349,7 @@ class Simulator:
for waveform_writer in self._waveform_writers:
for signal_state in self._state.pending:
waveform_writer.update(self._state.timeline.now,
signal_state.signal, signal_state.curr)
signal_state.signal, signal_state.next)
# 2. commit: apply every queued signal change, waking up any waiting processes
converged = self._state.commit()