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hdl._ast: fix using 0-width Switch with integer keys.

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This comes up in `AssignmentLegalizer`-produced `Switch`es for
`ArrayProxy`.
This commit is contained in:
Wanda 2024-02-13 23:48:59 +01:00 • committed by Catherine
parent 0ecd06a7e5
commit 5ffb48b5fb
2 changed files with 16 additions and 0 deletions
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10
tests/test_hdl_ast.py
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@ -1473,6 +1473,16 @@ class SwitchTestCase(FHDLTestCase):
s = Switch(Const(0, 8), {-10: []})
self.assertEqual(s.cases, {("11110110",): []})
def test_int_zero_width(self):
s = Switch(Const(0, 0), {0: []})
self.assertEqual(s.cases, {("",): []})
def test_int_zero_width_enum(self):
class ZeroEnum(Enum):
A = 0
s = Switch(Const(0, 0), {ZeroEnum.A: []})
self.assertEqual(s.cases, {("",): []})
def test_enum_case(self):
s = Switch(Const(0, UnsignedEnum), {UnsignedEnum.FOO: []})
self.assertEqual(s.cases, {("01",): []})