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Unbreak 655d02d5.

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whitequark 2019-01-15 23:09:10 +00:00
parent 655d02d5b8
commit 6191760c30
1 changed files with 2 additions and 2 deletions
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4
nmigen/back/rtlil.py
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@ -376,7 +376,7 @@ class _RHSValueCompiler(_ValueCompiler):
self.s.rtlil.cell("$anyconst", ports={ self.s.rtlil.cell("$anyconst", ports={
"\\Y": res, "\\Y": res,
}, params={ }, params={
"Y_WIDTH": res_bits, "WIDTH": res_bits,
}, src=src(value.src_loc)) }, src=src(value.src_loc))
return res return res
@ -386,7 +386,7 @@ class _RHSValueCompiler(_ValueCompiler):
self.s.rtlil.cell("$anyseq", ports={ self.s.rtlil.cell("$anyseq", ports={
"\\Y": res, "\\Y": res,
}, params={ }, params={
"Y_WIDTH": res_bits, "WIDTH": res_bits,
}, src=src(value.src_loc)) }, src=src(value.src_loc))
return res return res