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hdl.dsl: add missing case width check for Enum values.

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Fixes #305.
This commit is contained in:
whitequark 2020-01-31 23:14:16 +00:00
parent a9da9efe5b
commit 687d3a3df7
2 changed files with 14 additions and 0 deletions
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7
nmigen/hdl/dsl.py
View file

@ -309,6 +309,13 @@ class Module(_ModuleBuilderRoot, Elaboratable):
.format(pattern, len(switch_data["test"])),
SyntaxWarning, stacklevel=3)
continue
if isinstance(pattern, Enum) and bits_for(pattern.value) > len(switch_data["test"]):
warnings.warn("Case pattern '{:b}' ({}.{}) is wider than switch value "
"(which has width {}); comparison will never be true"
.format(pattern.value, pattern.__class__.__name__, pattern.name,
len(switch_data["test"])),
SyntaxWarning, stacklevel=3)
continue
new_patterns = (*new_patterns, pattern)
try:
_outer_case, self._statements = self._statements, []

7
nmigen/test/test_hdl_dsl.py
View file

@ -400,6 +400,8 @@ class DSLTestCase(FHDLTestCase):
""")
def test_Case_width_wrong(self):
class Color(Enum):
RED = 0b10101010
m = Module()
with m.Switch(self.w1):
with self.assertRaises(SyntaxError,
@ -411,6 +413,11 @@ class DSLTestCase(FHDLTestCase):
"comparison will never be true"):
with m.Case(0b10110):
pass
with self.assertWarns(SyntaxWarning,
msg="Case pattern '10101010' (Color.RED) is wider than switch value "
"(which has width 4); comparison will never be true"):
with m.Case(Color.RED):
pass
self.assertRepr(m._statements, """
(
(switch (sig w1) )