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hdl.xfrm: lower resets in DomainLowerer as well.

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Changed in preparation for introducing local clock domains.

Also makes elaboration about 15% faster.
This commit is contained in:
whitequark 2019-08-19 21:32:48 +00:00
parent 404f99f022
commit 69d36dc139
3 changed files with 23 additions and 13 deletions
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7
nmigen/test/test_hdl_xfrm.py
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@ -150,9 +150,10 @@ class DomainLowererTestCase(FHDLTestCase):
""")
def test_lower_drivers(self):
sync = ClockDomain()
pix = ClockDomain()
f = Fragment()
f.add_domains(pix)
f.add_domains(sync, pix)
f.add_driver(ClockSignal("pix"), None)
f.add_driver(ResetSignal("pix"), "sync")
@ -597,6 +598,7 @@ class UserValueTestCase(FHDLTestCase):
def test_lower(self):
sync = ClockDomain()
f = Fragment()
f.add_domains(sync)
f.add_statements(
self.uv.eq(1)
)
@ -611,5 +613,8 @@ class UserValueTestCase(FHDLTestCase):
(switch (sig c)
(case 1 (eq (sig s) (const 1'd0)))
)
(switch (sig rst)
(case 1 (eq (sig s) (const 1'd0)))
)
)
""")