back.pysim: raise an exception if delta cycles blow a process deadline.
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@ -7,7 +7,11 @@ from ..fhdl.ast import *
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from ..fhdl.xfrm import ValueTransformer, StatementTransformer
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from ..fhdl.xfrm import ValueTransformer, StatementTransformer
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__all__ = ["Simulator", "Delay", "Passive"]
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__all__ = ["Simulator", "Delay", "Tick", "Passive", "DeadlineError"]
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class DeadlineError(Exception):
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pass
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class _State:
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class _State:
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@ -426,9 +430,19 @@ class Simulator:
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.format(stmt, proc))
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.format(stmt, proc))
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def step(self, run_passive=False):
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def step(self, run_passive=False):
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deadline = None
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if self._wait_deadline:
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# We might run some delta cycles, and we have simulator processes waiting on
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# a deadline. Take care to not exceed the closest deadline.
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deadline = min(self._wait_deadline.values())
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# Are there any delta cycles we should run?
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# Are there any delta cycles we should run?
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while self._state.curr_dirty:
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while self._state.curr_dirty:
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self._timestamp += self._epsilon
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self._timestamp += self._epsilon
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if deadline is not None and self._timestamp >= deadline:
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# Oops, we blew the deadline. We *could* run the processes now, but this is
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# virtually certainly a logic loop and a design bug, so bail out instead.d
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raise DeadlineError("Delta cycles exceeded process deadline; combinatorial loop?")
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domains = set()
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domains = set()
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self._update_dirty_signals()
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self._update_dirty_signals()
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