vendor: yosys is not a required tool for proprietary toolchains.

Since commit b9799b4c, the discovery mechanism for the Yosys required
to produce Verilog is different from the usual require_tool(); namely
it is possible to produce Verilog without a `yosys` binary on PATH.

Fixes #419.

nmigen/vendor/lattice_ecp5.py

@@ -176,7 +176,6 @@ class LatticeECP5Platform(TemplatedPlatform):
     # Diamond templates
 
     _diamond_required_tools = [
-        "yosys",
         "pnmainc",
         "ddtcmd"
     ]

nmigen/vendor/lattice_ice40.py

@@ -172,7 +172,6 @@ class LatticeICE40Platform(TemplatedPlatform):
     # iCECube2 templates
 
     _icecube2_required_tools = [
-        "yosys",
         "synthesis",
         "synpwrap",
         "tclsh",

nmigen/vendor/lattice_machxo_2_3l.py

@@ -39,7 +39,6 @@ class LatticeMachXO2Or3LPlatform(TemplatedPlatform):
     grade   = "C" # [C]ommercial, [I]ndustrial
 
     required_tools = [
-        "yosys",
         "pnmainc",
         "ddtcmd"
     ]

nmigen/vendor/xilinx_7series.py

@@ -53,10 +53,7 @@ class Xilinx7SeriesPlatform(TemplatedPlatform):
     speed   = abstractproperty()
     grade   = None
 
-    required_tools = [
-        "yosys",
-        "vivado"
-    ]
+    required_tools = ["vivado"]
     file_templates = {
         **TemplatedPlatform.build_script_templates,
         "build_{{name}}.sh": r"""

nmigen/vendor/xilinx_spartan_3_6.py

@@ -59,7 +59,6 @@ class XilinxSpartan3Or6Platform(TemplatedPlatform):
     speed   = abstractproperty()
 
     required_tools = [
-        "yosys",
         "xst",
         "ngdbuild",
         "map",

nmigen/vendor/xilinx_ultrascale.py

@@ -53,10 +53,7 @@ class XilinxUltraScalePlatform(TemplatedPlatform):
     speed   = abstractproperty()
     grade   = None
 
-    required_tools = [
-        "yosys",
-        "vivado"
-    ]
+    required_tools = ["vivado"]
     file_templates = {
         **TemplatedPlatform.build_script_templates,
         "build_{{name}}.sh": r"""