test: use #nmigen: magic comment instead of monkey patch.

Also, fix missing and incorrect src_loc_at arguments where
appropriate so the testsuite passes without warnings.
This commit is contained in:
whitequark 2019-10-26 06:36:54 +00:00
parent 9786d0c0e3
commit 75d0fcd639
11 changed files with 35 additions and 24 deletions

View file

@ -53,11 +53,11 @@ class Memory:
raise TypeError("Memory initialization value at address {:x}: {}" raise TypeError("Memory initialization value at address {:x}: {}"
.format(addr, e)) from None .format(addr, e)) from None
def read_port(self, **kwargs): def read_port(self, *, src_loc_at=0, **kwargs):
return ReadPort(self, **kwargs) return ReadPort(self, src_loc_at=1 + src_loc_at, **kwargs)
def write_port(self, **kwargs): def write_port(self, *, src_loc_at=0, **kwargs):
return WritePort(self, **kwargs) return WritePort(self, src_loc_at=1 + src_loc_at, **kwargs)
def __getitem__(self, index): def __getitem__(self, index):
"""Simulation only.""" """Simulation only."""
@ -65,7 +65,7 @@ class Memory:
class ReadPort(Elaboratable): class ReadPort(Elaboratable):
def __init__(self, memory, *, domain="sync", transparent=True): def __init__(self, memory, *, domain="sync", transparent=True, src_loc_at=0):
if domain == "comb" and not transparent: if domain == "comb" and not transparent:
raise ValueError("Read port cannot be simultaneously asynchronous and non-transparent") raise ValueError("Read port cannot be simultaneously asynchronous and non-transparent")
@ -74,11 +74,12 @@ class ReadPort(Elaboratable):
self.transparent = transparent self.transparent = transparent
self.addr = Signal(range(memory.depth), self.addr = Signal(range(memory.depth),
name="{}_r_addr".format(memory.name), src_loc_at=2) name="{}_r_addr".format(memory.name), src_loc_at=2 + src_loc_at)
self.data = Signal(memory.width, self.data = Signal(memory.width,
name="{}_r_data".format(memory.name), src_loc_at=2) name="{}_r_data".format(memory.name), src_loc_at=2 + src_loc_at)
if self.domain != "comb" and not transparent: if self.domain != "comb" and not transparent:
self.en = Signal(name="{}_r_en".format(memory.name), src_loc_at=2, reset=1) self.en = Signal(name="{}_r_en".format(memory.name), reset=1,
src_loc_at=2 + src_loc_at)
else: else:
self.en = Const(1) self.en = Const(1)
@ -132,7 +133,7 @@ class ReadPort(Elaboratable):
class WritePort(Elaboratable): class WritePort(Elaboratable):
def __init__(self, memory, *, domain="sync", granularity=None): def __init__(self, memory, *, domain="sync", granularity=None, src_loc_at=0):
if granularity is None: if granularity is None:
granularity = memory.width granularity = memory.width
if not isinstance(granularity, int) or granularity < 0: if not isinstance(granularity, int) or granularity < 0:
@ -150,11 +151,11 @@ class WritePort(Elaboratable):
self.granularity = granularity self.granularity = granularity
self.addr = Signal(range(memory.depth), self.addr = Signal(range(memory.depth),
name="{}_w_addr".format(memory.name), src_loc_at=2) name="{}_w_addr".format(memory.name), src_loc_at=2 + src_loc_at)
self.data = Signal(memory.width, self.data = Signal(memory.width,
name="{}_w_data".format(memory.name), src_loc_at=2) name="{}_w_data".format(memory.name), src_loc_at=2 + src_loc_at)
self.en = Signal(memory.width // granularity, self.en = Signal(memory.width // granularity,
name="{}_w_en".format(memory.name), src_loc_at=2) name="{}_w_en".format(memory.name), src_loc_at=2 + src_loc_at)
def elaborate(self, platform): def elaborate(self, platform):
f = Instance("$memwr", f = Instance("$memwr",

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@ -310,14 +310,14 @@ class FragmentTransformer:
self.map_drivers(fragment, new_fragment) self.map_drivers(fragment, new_fragment)
return new_fragment return new_fragment
def __call__(self, value): def __call__(self, value, *, src_loc_at=0):
if isinstance(value, Fragment): if isinstance(value, Fragment):
return self.on_fragment(value) return self.on_fragment(value)
elif isinstance(value, TransformedElaboratable): elif isinstance(value, TransformedElaboratable):
value._transforms_.append(self) value._transforms_.append(self)
return value return value
elif hasattr(value, "elaborate"): elif hasattr(value, "elaborate"):
value = TransformedElaboratable(value) value = TransformedElaboratable(value, src_loc_at=1 + src_loc_at)
value._transforms_.append(self) value._transforms_.append(self)
return value return value
else: else:
@ -325,7 +325,7 @@ class FragmentTransformer:
class TransformedElaboratable(Elaboratable): class TransformedElaboratable(Elaboratable):
def __init__(self, elaboratable): def __init__(self, elaboratable, *, src_loc_at=0):
assert hasattr(elaboratable, "elaborate") assert hasattr(elaboratable, "elaborate")
# Fields prefixed and suffixed with underscore to avoid as many conflicts with the inner # Fields prefixed and suffixed with underscore to avoid as many conflicts with the inner
@ -725,9 +725,9 @@ class _ControlInserter(FragmentTransformer):
def _insert_control(self, fragment, domain, signals): def _insert_control(self, fragment, domain, signals):
raise NotImplementedError # :nocov: raise NotImplementedError # :nocov:
def __call__(self, value): def __call__(self, value, *, src_loc_at=0):
self.src_loc = tracer.get_src_loc() self.src_loc = tracer.get_src_loc(src_loc_at=src_loc_at)
return super().__call__(value) return super().__call__(value, src_loc_at=1 + src_loc_at)
class ResetInserter(_ControlInserter): class ResetInserter(_ControlInserter):

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@ -1,6 +0,0 @@
from ..hdl.ir import Elaboratable
# The nMigen testsuite creates a lot of elaboratables that are intentionally unused.
# Disable the unused elaboratable check, as in our case it provides nothing but noise.
del Elaboratable.__del__

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@ -1,3 +1,5 @@
# nmigen: UnusedElaboratable=no
import unittest import unittest
from ...compat import * from ...compat import *

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@ -1,3 +1,5 @@
# nmigen: UnusedElaboratable=no
from .. import * from .. import *
from ..hdl.rec import * from ..hdl.rec import *
from ..lib.io import * from ..lib.io import *

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@ -1,3 +1,5 @@
# nmigen: UnusedElaboratable=no
from collections import OrderedDict from collections import OrderedDict
from enum import Enum from enum import Enum

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@ -1,3 +1,5 @@
# nmigen: UnusedElaboratable=no
from collections import OrderedDict from collections import OrderedDict
from ..hdl.ast import * from ..hdl.ast import *

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@ -1,3 +1,5 @@
# nmigen: UnusedElaboratable=no
from ..hdl.ast import * from ..hdl.ast import *
from ..hdl.mem import * from ..hdl.mem import *
from .utils import * from .utils import *

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@ -1,3 +1,5 @@
# nmigen: UnusedElaboratable=no
from ..hdl.ast import * from ..hdl.ast import *
from ..hdl.cd import * from ..hdl.cd import *
from ..hdl.ir import * from ..hdl.ir import *

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@ -1,3 +1,5 @@
# nmigen: UnusedElaboratable=no
from .utils import * from .utils import *
from ..hdl import * from ..hdl import *
from ..back.pysim import * from ..back.pysim import *

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@ -1,3 +1,5 @@
# nmigen: UnusedElaboratable=no
from .utils import * from .utils import *
from ..hdl import * from ..hdl import *
from ..asserts import * from ..asserts import *