Rename fhdl→hdl, genlib→lib.

nmigen/compat/fhdl/bitcontainer.py

@@ -1,5 +1,5 @@
 from ... import tools
-from ...fhdl import ast
+from ...hdl import ast
 from ...tools import deprecated
 
 

nmigen/compat/fhdl/module.py

@@ -1,7 +1,7 @@
 from collections.abc import Iterable
 
 from ...tools import flatten, deprecated
-from ...fhdl import dsl
+from ...hdl import dsl
 
 
 __all__ = ["Module", "FinalizeError"]

nmigen/compat/fhdl/specials.py

@@ -1,4 +1,4 @@
-from ...genlib.io import TSTriple as NativeTSTriple
+from ...lib.io import TSTriple as NativeTSTriple
 
 
 __all__ = ["TSTriple"]

nmigen/compat/fhdl/structure.py

@@ -1,9 +1,9 @@
 from collections import OrderedDict
 
 from ...tools import deprecated
-from ...fhdl import ast
-from ...fhdl.ast import DUID, Value, Signal, Mux, Cat, Repl, Const, C, ClockSignal, ResetSignal
-from ...fhdl.cd import ClockDomain
+from ...hdl import ast
+from ...hdl.ast import DUID, Value, Signal, Mux, Cat, Repl, Const, C, ClockSignal, ResetSignal
+from ...hdl.cd import ClockDomain
 
 
 __all__ = ["DUID", "wrap", "Mux", "Cat", "Replicate", "Constant", "C", "Signal", "ClockSignal",

nmigen/compat/genlib/cdc.py

@@ -1,4 +1,4 @@
-from ...genlib.cdc import MultiReg
+from ...lib.cdc import MultiReg
 
 
 __all__ = ["MultiReg"]

nmigen/compat/genlib/fsm.py

@@ -1,8 +1,8 @@
 import warnings
 from collections import OrderedDict
 
-from ...fhdl.xfrm import ValueTransformer, StatementTransformer
-from ...fhdl.ast import *
+from ...hdl.xfrm import ValueTransformer, StatementTransformer
+from ...hdl.ast import *
 from ..fhdl.module import CompatModule, CompatFinalizeError
 from ..fhdl.structure import If, Case