parent
7e2b72826f
commit
7c161957bf
|
@ -197,8 +197,11 @@ class Resource(Subsignal):
|
|||
return cls(name_or_number + name_suffix, number, *ios)
|
||||
|
||||
def __init__(self, name, number, *args):
|
||||
super().__init__(name, *args)
|
||||
if not isinstance(number, int):
|
||||
raise TypeError("Resource number must be an integer, not {!r}"
|
||||
.format(number))
|
||||
|
||||
super().__init__(name, *args)
|
||||
self.number = number
|
||||
|
||||
def __repr__(self):
|
||||
|
|
|
@ -242,6 +242,12 @@ class ResourceTestCase(FHDLTestCase):
|
|||
" (subsignal rx (pins i A1))"
|
||||
" (attrs IOSTANDARD='LVCMOS33'))")
|
||||
|
||||
def test_number_wrong(self):
|
||||
with self.assertRaisesRegex(TypeError,
|
||||
r"^Resource number must be an integer, not \(pins o 1\)$"):
|
||||
# number omitted by accident
|
||||
Resource("led", Pins("1", dir="o"))
|
||||
|
||||
def test_family(self):
|
||||
ios = [Subsignal("clk", Pins("A0", dir="o"))]
|
||||
r1 = Resource.family(0, default_name="spi", ios=ios)
|
||||
|
|
Loading…
Reference in a new issue