vendor.lattice_ecp5: add Diamond support.
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parent
c77274c1ad
commit
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148
nmigen/vendor/lattice_ecp5.py
vendored
148
nmigen/vendor/lattice_ecp5.py
vendored
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@ -9,6 +9,9 @@ __all__ = ["LatticeECP5Platform"]
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class LatticeECP5Platform(TemplatedPlatform):
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"""
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Trellis toolchain
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-----------------
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Required tools:
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* ``yosys``
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* ``nextpnr-ecp5``
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@ -34,13 +37,37 @@ class LatticeECP5Platform(TemplatedPlatform):
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* ``{{name}}.config``: ASCII bitstream.
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* ``{{name}}.bit``: binary bitstream.
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* ``{{name}}.svf``: JTAG programming vector.
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Diamond toolchain
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-----------------
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Required tools:
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* ``pnmainc``
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* ``ddtcmd``
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The environment is populated by running the script specified in the environment variable
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``NMIGEN_Diamond_env``, if present.
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Available overrides:
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* ``script_project``: inserts commands before ``prj_project save`` in Tcl script.
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* ``script_after_export``: inserts commands after ``prj_run Export`` in Tcl script.
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* ``add_preferences``: inserts commands in LPF file.
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* ``add_constraints``: inserts commands in XDC file.
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Build products:
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* ``{{name}}_impl/{{name}}_impl.htm``: consolidated log.
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* ``{{name}}.bit``: binary bitstream.
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* ``{{name}}.svf``: JTAG programming vector.
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"""
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toolchain = "Trellis"
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toolchain = None # selected when creating platform
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device = abstractproperty()
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package = abstractproperty()
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speed = abstractproperty()
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grade = "C" # [C]ommercial, [I]ndustrial
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# Trellis templates
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_nextpnr_device_options = {
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"LFE5U-12F": "--25k",
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@ -64,7 +91,7 @@ class LatticeECP5Platform(TemplatedPlatform):
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"BG756": "caBGA756",
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}
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file_templates = {
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_trellis_file_templates = {
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**TemplatedPlatform.build_script_templates,
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"{{name}}.il": r"""
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# {{autogenerated}}
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@ -98,7 +125,7 @@ class LatticeECP5Platform(TemplatedPlatform):
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{% endfor %}
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"""
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}
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command_templates = [
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_trellis_command_templates = [
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r"""
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{{get_tool("yosys")}}
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{{quiet("-q")}}
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@ -127,6 +154,107 @@ class LatticeECP5Platform(TemplatedPlatform):
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"""
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]
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# Diamond templates
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_diamond_file_templates = {
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**TemplatedPlatform.build_script_templates,
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"build_{{name}}.sh": r"""
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# {{autogenerated}}
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set -e{{verbose("x")}}
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if [ -z "$BASH" ] ; then exec /bin/bash "$0" "$@"; fi
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if [ -n "$NMIGEN_{{platform.toolchain}}_env" ]; then
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bindir=$(dirname "$NMIGEN_{{platform.toolchain}}_env")
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. "$NMIGEN_{{platform.toolchain}}_env"
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fi
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{{emit_commands("sh")}}
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""",
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"{{name}}.v": r"""
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/* {{autogenerated}} */
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{{emit_design("verilog")}}
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""",
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"{{name}}.tcl": r"""
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prj_project new -name "{{name}}" -impl "impl" -impl_dir "top_impl" \
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-dev {{platform.device}}-{{platform.speed}}{{platform.package}}{{platform.grade}} \
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-lpf "{{name}}.lpf" \
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-synthesis synplify
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{% for file in platform.iter_extra_files(".v", ".sv", ".vhd", ".vhdl") -%}
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prj_src add "{{file}}"
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{% endfor %}
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prj_src add "{{name}}.v"
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prj_impl option top "{{name}}"
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prj_src add "{{name}}.sdc"
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{{get_override("script_project")|default("# (script_project placeholder)")}}
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prj_project save
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prj_run Synthesis -impl "impl" -forceAll
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prj_run Translate -impl "impl" -forceAll
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prj_run Map -impl "impl" -forceAll
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prj_run PAR -impl "impl" -forceAll
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prj_run Export -impl "impl" -forceAll -task Bitgen
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{{get_override("script_after_export")|default("# (script_after_export placeholder)")}}
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""",
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"{{name}}.lpf": r"""
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# {{autogenerated}}
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BLOCK ASYNCPATHS;
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BLOCK RESETPATHS;
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{% for port_name, pin_name, extras in platform.iter_port_constraints_bits() -%}
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LOCATE COMP "{{port_name}}" SITE "{{pin_name}}";
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IOBUF PORT "{{port_name}}"
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{%- for key, value in extras.items() %} {{key}}={{value}}{% endfor %};
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{% endfor %}
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{% for signal, frequency in platform.iter_clock_constraints() -%}
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FREQUENCY PORT "{{signal.name}}" {{frequency/1000000}} MHZ;
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{% endfor %}
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{{get_override("add_preferences")|default("# (add_preferences placeholder)")}}
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""",
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"{{name}}.sdc": r"""
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{% for signal, frequency in platform.iter_clock_constraints() -%}
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create_clock -period {{1000000000/frequency}} [get_ports {{signal.name}}]
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{% endfor %}
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{{get_override("add_constraints")|default("# (add_constraints placeholder)")}}
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""",
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}
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_diamond_command_templates = [
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# These don't have any usable command-line option overrides.
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r"""
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{{get_tool("pnmainc")}}
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{{name}}.tcl
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""",
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r"""
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{{get_tool("ddtcmd")}}
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-oft -bit
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-if {{name}}_impl/{{name}}_impl.bit -of {{name}}.bit
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""",
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r"""
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{{get_tool("ddtcmd")}}
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-oft -svfsingle -revd -op "Fast Program"
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-if {{name}}_impl/{{name}}_impl.bit -of {{name}}.svf
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""",
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]
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# Common logic
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def __init__(self, *, toolchain="Diamond"):
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super().__init__()
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assert toolchain in ("Trellis", "Diamond")
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self.toolchain = toolchain
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@property
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def file_templates(self):
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if self.toolchain == "Trellis":
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return self._trellis_file_templates
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if self.toolchain == "Diamond":
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return self._diamond_file_templates
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assert False
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@property
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def command_templates(self):
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if self.toolchain == "Trellis":
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return self._trellis_command_templates
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if self.toolchain == "Diamond":
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return self._diamond_command_templates
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assert False
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def create_missing_domain(self, name):
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# No additional reset logic needed.
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return super().create_missing_domain(name)
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@ -187,19 +315,19 @@ class LatticeECP5Platform(TemplatedPlatform):
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o_Q=q[bit]
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)
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def get_ineg(y, invert):
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def get_ineg(z, invert):
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if invert:
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a = Signal.like(y, name_suffix="_n")
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m.d.comb += y.eq(~a)
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a = Signal.like(z, name_suffix="_n")
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m.d.comb += z.eq(~a)
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return a
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else:
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return y
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return z
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def get_oneg(a, invert):
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if invert:
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y = Signal.like(a, name_suffix="_n")
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m.d.comb += y.eq(~a)
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return y
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z = Signal.like(a, name_suffix="_n")
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m.d.comb += z.eq(~a)
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return z
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else:
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return a
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