Implement RFC 45: Move hdl.Memory to lib.Memory.
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16 changed files with 983 additions and 141 deletions
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@ -1,4 +1,5 @@
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from amaranth import *
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from amaranth.lib.memory import Memory
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from amaranth.cli import main
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@ -8,12 +9,13 @@ class RegisterFile(Elaboratable):
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self.dat_r = Signal(8)
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self.dat_w = Signal(8)
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self.we = Signal()
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self.mem = Memory(width=8, depth=16, init=[0xaa, 0x55])
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self.mem = Memory(shape=8, depth=16, init=[0xaa, 0x55])
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def elaborate(self, platform):
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m = Module()
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m.submodules.rdport = rdport = self.mem.read_port()
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m.submodules.wrport = wrport = self.mem.write_port()
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m.submodules.mem = self.mem
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rdport = self.mem.read_port()
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wrport = self.mem.write_port()
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m.d.comb += [
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rdport.addr.eq(self.adr),
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self.dat_r.eq(rdport.data),
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