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Rename nMigen to Amaranth HDL.

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This commit is contained in:
whitequark 2021-12-10 05:39:50 +00:00
parent 0b28a97ca0
commit 909a3b8be7
200 changed files with 14493 additions and 14451 deletions
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4
docs/_code/led_blinker.py
View file

@ -1,4 +1,4 @@
from nmigen import *
from amaranth import *
class LEDBlinker(Elaboratable):
@ -18,7 +18,7 @@ class LEDBlinker(Elaboratable):
return m
# --- BUILD ---
from nmigen_boards.icestick import *
from amaranth_boards.icestick import *
ICEStickPlatform().build(LEDBlinker(), do_program=True)

6
docs/_code/up_counter.py
View file

@ -1,4 +1,4 @@
from nmigen import *
from amaranth import *
class UpCounter(Elaboratable):
@ -41,7 +41,7 @@ class UpCounter(Elaboratable):
return m
# --- TEST ---
from nmigen.sim import Simulator
from amaranth.sim import Simulator
dut = UpCounter(25)
@ -71,7 +71,7 @@ sim.add_sync_process(bench)
with sim.write_vcd("up_counter.vcd"):
sim.run()
# --- CONVERT ---
from nmigen.back import verilog
from amaranth.back import verilog
top = UpCounter(25)

8
docs/_code/up_counter.v
View file

@ -1,8 +1,8 @@
(* generator = "nMigen" *)
(* generator = "Amaranth" *)
module top(clk, rst, en, ovf);
(* src = "<nmigen-root>/nmigen/hdl/ir.py:526" *)
(* src = "<amaranth-root>/amaranth/hdl/ir.py:526" *)
input clk;
(* src = "<nmigen-root>/nmigen/hdl/ir.py:526" *)
(* src = "<amaranth-root>/amaranth/hdl/ir.py:526" *)
input rst;
(* src = "up_counter.py:26" *)
input en;
@ -38,7 +38,7 @@ module top(clk, rst, en, ovf);
\count$next = \$3 [15:0];
endcase
endcase
(* src = "<nmigen-root>/nmigen/hdl/xfrm.py:518" *)
(* src = "<amaranth-root>/amaranth/hdl/xfrm.py:518" *)
casez (rst)
1'h1:
\count$next = 16'h0000;