vendor.lattice_{ecp5,ice40}: allow clock constraints on arbitrary signals.
Fixes #88.
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parent
378e924280
commit
91ef2f58e3
4
nmigen/vendor/lattice_ecp5.py
vendored
4
nmigen/vendor/lattice_ecp5.py
vendored
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@ -121,7 +121,7 @@ class LatticeECP5Platform(TemplatedPlatform):
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{%- for key, value in extras.items() %} {{key}}={{value}}{% endfor %};
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{%- for key, value in extras.items() %} {{key}}={{value}}{% endfor %};
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{% endfor %}
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{% endfor %}
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{% for signal, frequency in platform.iter_clock_constraints() -%}
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{% for signal, frequency in platform.iter_clock_constraints() -%}
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FREQUENCY PORT "{{signal.name}}" {{frequency}} HZ;
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FREQUENCY NET "{{signal|hierarchy(".")}}" {{frequency}} HZ;
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{% endfor %}
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{% endfor %}
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"""
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"""
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}
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}
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@ -203,7 +203,7 @@ class LatticeECP5Platform(TemplatedPlatform):
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{%- for key, value in extras.items() %} {{key}}={{value}}{% endfor %};
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{%- for key, value in extras.items() %} {{key}}={{value}}{% endfor %};
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{% endfor %}
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{% endfor %}
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{% for signal, frequency in platform.iter_clock_constraints() -%}
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{% for signal, frequency in platform.iter_clock_constraints() -%}
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FREQUENCY PORT "{{signal.name}}" {{frequency/1000000}} MHZ;
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FREQUENCY NET "{{signal|hierarchy("/")}}" {{frequency/1000000}} MHZ;
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{% endfor %}
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{% endfor %}
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{{get_override("add_preferences")|default("# (add_preferences placeholder)")}}
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{{get_override("add_preferences")|default("# (add_preferences placeholder)")}}
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""",
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""",
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2
nmigen/vendor/lattice_ice40.py
vendored
2
nmigen/vendor/lattice_ice40.py
vendored
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@ -97,7 +97,7 @@ class LatticeICE40Platform(TemplatedPlatform):
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# {{autogenerated}}
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# {{autogenerated}}
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{% for signal, frequency in platform.iter_clock_constraints() -%}
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{% for signal, frequency in platform.iter_clock_constraints() -%}
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{# Clock in MHz #}
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{# Clock in MHz #}
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ctx.addClock("{{signal.name}}", {{frequency/1000000}})
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ctx.addClock("{{signal|hierarchy(".")}}", {{frequency/1000000}})
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{% endfor%}
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{% endfor%}
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""",
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""",
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}
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}
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