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back.verilog: use proc -nomux if it is available.

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Yosys offers no stability guarantees for individual `proc_*` passes,
though so far it worked out fine. This commit changes the Verilog
backend to use `proc -nomux` instead, which is guaranteed to have
backwards-compatible behavior.

Fixes #479.
This commit is contained in:
whitequark 2020-08-27 13:03:15 +00:00
parent b65e11f38f
commit 955f3f6dcc
1 changed files with 12 additions and 8 deletions
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20
nmigen/back/verilog.py
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@ -13,15 +13,19 @@ def _convert_rtlil_text(rtlil_text, *, strip_internal_attrs=False, write_verilog
script = [] script = []
script.append("read_ilang <<rtlil\n{}\nrtlil".format(rtlil_text)) script.append("read_ilang <<rtlil\n{}\nrtlil".format(rtlil_text))
if yosys_version >= (0, 9, 3468): if yosys_version >= (0, 9, 3527):
# Yosys >=0.9+3468 (since commit f3d7e9a1) emits Verilog without a possible sim/synth # Yosys >=0.9+3527 (since commit 656ee70f) supports the `-nomux` option for the `proc`
# mismatch, making $verilog_initial_trigger unnecessary. # script pass. Because the individual `proc_*` passes are not a stable interface,
# `proc -nomux` is used instead, if available.
script.append("delete w:$verilog_initial_trigger") script.append("delete w:$verilog_initial_trigger")
script.append("proc_prune") script.append("proc -nomux")
script.append("proc_init") else:
script.append("proc_arst") # On earlier versions, use individual `proc_*` passes; this is a known range of Yosys
script.append("proc_dff") # versions and we know it's compatible with what nMigen does.
script.append("proc_clean") script.append("proc_init")
script.append("proc_arst")
script.append("proc_dff")
script.append("proc_clean")
script.append("memory_collect") script.append("memory_collect")
if strip_internal_attrs: if strip_internal_attrs: