hdl.xfrm: handle mem.{Read,Write}Port in CEInserter.

Fixes #154.

nmigen/test/test_hdl_xfrm.py

@@ -2,6 +2,7 @@ from ..hdl.ast import *
 from ..hdl.cd import *
 from ..hdl.ir import *
 from ..hdl.xfrm import *
+from ..hdl.mem import *
 from .tools import *
 
 
@@ -513,6 +514,20 @@ class CEInserterTestCase(FHDLTestCase):
         )
         """)
 
+    def test_ce_read_port(self):
+        mem = Memory(width=8, depth=4)
+        f = CEInserter(self.c1)(mem.read_port(transparent=False)).elaborate(platform=None)
+        self.assertRepr(f.named_ports["EN"][0], """
+        (m (sig c1) (sig mem_r_en) (const 1'd0))
+        """)
+
+    def test_ce_write_port(self):
+        mem = Memory(width=8, depth=4)
+        f = CEInserter(self.c1)(mem.write_port()).elaborate(platform=None)
+        self.assertRepr(f.named_ports["EN"][0], """
+        (m (sig c1) (cat (repl (slice (sig mem_w_en) 0:1) 8)) (const 8'd0))
+        """)
+
 
 class _MockElaboratable(Elaboratable):
     def __init__(self):

nmigen/test/tools.py

@@ -18,7 +18,8 @@ __all__ = ["FHDLTestCase"]
 
 class FHDLTestCase(unittest.TestCase):
     def assertRepr(self, obj, repr_str):
-        obj = Statement.wrap(obj)
+        if isinstance(obj, list):
+            obj = Statement.wrap(obj)
         def prepare_repr(repr_str):
             repr_str = re.sub(r"\s+",   " ",  repr_str)
             repr_str = re.sub(r"\( (?=\()", "(", repr_str)