usb-tools/amaranth
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

hdl.dsl: make if m.{If,Elif,Else}(...) a syntax error.

Browse source 
A common typo, and hard to notice when it's silently ignored.

Fixes #284.
This commit is contained in:
whitequark 2020-01-31 06:37:45 +00:00
parent 3ac13eb8f9
commit 9964fc6b57
2 changed files with 43 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

17
nmigen/test/test_hdl_dsl.py
View file

@ -300,6 +300,23 @@ class DSLTestCase(FHDLTestCase):
with m.Elif(~True):
pass
def test_if_If_Elif_Else(self):
m = Module()
with self.assertRaises(SyntaxError,
msg="`if m.If(...):` does not work; use `with m.If(...)`"):
if m.If(0):
pass
with m.If(0):
pass
with self.assertRaises(SyntaxError,
msg="`if m.Elif(...):` does not work; use `with m.Elif(...)`"):
if m.Elif(0):
pass
with self.assertRaises(SyntaxError,
msg="`if m.Else(...):` does not work; use `with m.Else(...)`"):
if m.Else():
pass
def test_Switch(self):
m = Module()
with m.Switch(self.w1):