lib.fifo.AsyncFIFOBuffered: fix output register accounting

This commit is contained in:
Robin Ole Heinemann 2021-01-03 00:17:48 +01:00 committed by whitequark
parent 2a7a3aef87
commit 9af8201727
2 changed files with 8 additions and 2 deletions

View file

@ -509,7 +509,7 @@ class AsyncFIFOBuffered(Elaboratable, FIFOInterface):
]
r_consume_buffered = Signal()
m.d.comb += r_consume_buffered.eq(self.r_rdy - self.r_en)
m.d.comb += r_consume_buffered.eq((self.r_rdy - self.r_en) & self.r_rdy)
m.d[self._r_domain] += self.r_level.eq(fifo.r_level + r_consume_buffered)
w_consume_buffered = Signal()