build.dsl: add support for connectors.
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@ -1,2 +1,2 @@
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from .dsl import Pins, DiffPairs, Subsignal, Resource
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from .dsl import Pins, DiffPairs, Subsignal, Resource, Connector
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from .plat import Platform, TemplatedPlatform
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from .plat import Platform, TemplatedPlatform
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@ -1,17 +1,29 @@
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__all__ = ["Pins", "DiffPairs", "Subsignal", "Resource"]
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from collections import OrderedDict
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__all__ = ["Pins", "DiffPairs", "Subsignal", "Resource", "Connector"]
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class Pins:
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class Pins:
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def __init__(self, names, dir="io"):
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def __init__(self, names, *, dir="io", conn=None):
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if not isinstance(names, str):
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if not isinstance(names, str):
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raise TypeError("Names must be a whitespace-separated string, not {!r}"
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raise TypeError("Names must be a whitespace-separated string, not {!r}"
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.format(names))
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.format(names))
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self.names = names.split()
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names = names.split()
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if conn is not None:
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conn_name, conn_number = conn
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if not (isinstance(conn_name, str) and isinstance(conn_number, int)):
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raise TypeError("Connector must be None or a pair of string and integer, not {!r}"
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.format(conn))
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names = ["{}_{}:{}".format(conn_name, conn_number, name) for name in names]
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if dir not in ("i", "o", "io"):
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if dir not in ("i", "o", "io"):
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raise TypeError("Direction must be one of \"i\", \"o\", \"oe\", or \"io\", not {!r}"
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raise TypeError("Direction must be one of \"i\", \"o\", \"oe\", or \"io\", not {!r}"
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.format(dir))
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.format(dir))
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self.dir = dir
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self.names = names
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self.dir = dir
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def __len__(self):
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def __len__(self):
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return len(self.names)
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return len(self.names)
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@ -19,14 +31,23 @@ class Pins:
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def __iter__(self):
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def __iter__(self):
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return iter(self.names)
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return iter(self.names)
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def map_names(self, mapping, resource):
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for name in self.names:
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while ":" in name:
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if name not in mapping:
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raise NameError("Resource {!r} refers to nonexistent connector pin {}"
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.format(resource, name))
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name = mapping[name]
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yield name
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def __repr__(self):
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def __repr__(self):
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return "(pins {} {})".format(self.dir, " ".join(self.names))
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return "(pins {} {})".format(self.dir, " ".join(self.names))
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class DiffPairs:
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class DiffPairs:
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def __init__(self, p, n, dir="io"):
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def __init__(self, p, n, *, dir="io", conn=None):
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self.p = Pins(p, dir=dir)
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self.p = Pins(p, dir=dir, conn=conn)
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self.n = Pins(n, dir=dir)
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self.n = Pins(n, dir=dir, conn=conn)
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if len(self.p.names) != len(self.n.names):
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if len(self.p.names) != len(self.n.names):
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raise TypeError("Positive and negative pins must have the same width, but {!r} "
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raise TypeError("Positive and negative pins must have the same width, but {!r} "
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@ -105,3 +126,42 @@ class Resource(Subsignal):
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" ".join(map(repr, self.io)),
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" ".join(map(repr, self.io)),
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" ".join("{}={}".format(k, v)
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" ".join("{}={}".format(k, v)
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for k, v in self.extras.items()))
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for k, v in self.extras.items()))
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class Connector:
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def __init__(self, name, number, io):
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self.name = name
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self.number = number
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self.mapping = OrderedDict()
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if isinstance(io, dict):
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for conn_pin, plat_pin in io.items():
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if not isinstance(conn_pin, str):
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raise TypeError("Connector pin name must be a string, not {!r}"
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.format(conn_pin))
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if not isinstance(plat_pin, str):
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raise TypeError("Platform pin name must be a string, not {!r}"
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.format(plat_pin))
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self.mapping[conn_pin] = plat_pin
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elif isinstance(io, str):
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for conn_pin, plat_pin in enumerate(io.split(), start=1):
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if plat_pin == "-":
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continue
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self.mapping[str(conn_pin)] = plat_pin
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else:
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raise TypeError("Connector I/Os must be a dictionary or a string, not {!r}"
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.format(io))
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def __repr__(self):
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return "(connector {} {} {})".format(self.name, self.number,
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" ".join("{}=>{}".format(conn, plat)
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for conn, plat in self.mapping.items()))
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def __len__(self):
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return len(self.mapping)
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def __iter__(self):
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for conn_pin, plat_pin in self.mapping.items():
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yield "{}_{}:{}".format(self.name, self.number, conn_pin), plat_pin
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@ -1,3 +1,5 @@
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from collections import OrderedDict
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from ..build.dsl import *
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from ..build.dsl import *
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from .tools import *
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from .tools import *
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@ -10,6 +12,27 @@ class PinsTestCase(FHDLTestCase):
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self.assertEqual(p.dir, "io")
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self.assertEqual(p.dir, "io")
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self.assertEqual(list(p), ["A0", "A1", "A2"])
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self.assertEqual(list(p), ["A0", "A1", "A2"])
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def test_conn(self):
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p = Pins("0 1 2", conn=("pmod", 0))
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self.assertEqual(list(p), ["pmod_0:0", "pmod_0:1", "pmod_0:2"])
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def test_map_names(self):
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p = Pins("0 1 2", conn=("pmod", 0))
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mapping = {
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"pmod_0:0": "A0",
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"pmod_0:1": "A1",
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"pmod_0:2": "A2",
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}
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self.assertEqual(list(p.map_names(mapping, p)), ["A0", "A1", "A2"])
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def test_map_names_recur(self):
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p = Pins("0", conn=("pmod", 0))
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mapping = {
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"pmod_0:0": "ext_0:1",
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"ext_0:1": "A1",
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}
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self.assertEqual(list(p.map_names(mapping, p)), ["A1"])
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def test_wrong_names(self):
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def test_wrong_names(self):
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with self.assertRaises(TypeError,
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with self.assertRaises(TypeError,
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msg="Names must be a whitespace-separated string, not ['A0', 'A1', 'A2']"):
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msg="Names must be a whitespace-separated string, not ['A0', 'A1', 'A2']"):
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@ -20,6 +43,16 @@ class PinsTestCase(FHDLTestCase):
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msg="Direction must be one of \"i\", \"o\", \"oe\", or \"io\", not 'wrong'"):
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msg="Direction must be one of \"i\", \"o\", \"oe\", or \"io\", not 'wrong'"):
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p = Pins("A0 A1", dir="wrong")
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p = Pins("A0 A1", dir="wrong")
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def test_wrong_map_names(self):
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p = Pins("0 1 2", conn=("pmod", 0))
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mapping = {
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"pmod_0:0": "A0",
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}
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with self.assertRaises(NameError,
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msg="Resource (pins io pmod_0:0 pmod_0:1 pmod_0:2) refers to nonexistent "
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"connector pin pmod_0:1"):
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list(p.map_names(mapping, p))
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class DiffPairsTestCase(FHDLTestCase):
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class DiffPairsTestCase(FHDLTestCase):
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def test_basic(self):
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def test_basic(self):
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@ -30,6 +63,14 @@ class DiffPairsTestCase(FHDLTestCase):
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self.assertEqual(dp.dir, "io")
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self.assertEqual(dp.dir, "io")
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self.assertEqual(list(dp), [("A0", "B0"), ("A1", "B1")])
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self.assertEqual(list(dp), [("A0", "B0"), ("A1", "B1")])
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def test_conn(self):
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dp = DiffPairs(p="0 1 2", n="3 4 5", conn=("pmod", 0))
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self.assertEqual(list(dp), [
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("pmod_0:0", "pmod_0:3"),
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("pmod_0:1", "pmod_0:4"),
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("pmod_0:2", "pmod_0:5"),
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])
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def test_dir(self):
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def test_dir(self):
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dp = DiffPairs("A0", "B0", dir="o")
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dp = DiffPairs("A0", "B0", dir="o")
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self.assertEqual(dp.dir, "o")
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self.assertEqual(dp.dir, "o")
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@ -118,3 +159,54 @@ class ResourceTestCase(FHDLTestCase):
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" (subsignal tx (pins o A0) IOSTANDARD=LVCMOS33)"
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" (subsignal tx (pins o A0) IOSTANDARD=LVCMOS33)"
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" (subsignal rx (pins i A1) IOSTANDARD=LVCMOS33)"
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" (subsignal rx (pins i A1) IOSTANDARD=LVCMOS33)"
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" IOSTANDARD=LVCMOS33)")
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" IOSTANDARD=LVCMOS33)")
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class ConnectorTestCase(FHDLTestCase):
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def test_string(self):
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c = Connector("pmod", 0, "A0 A1 A2 A3 - - A4 A5 A6 A7 - -")
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self.assertEqual(c.name, "pmod")
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self.assertEqual(c.number, 0)
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self.assertEqual(c.mapping, OrderedDict([
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("1", "A0"),
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("2", "A1"),
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("3", "A2"),
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("4", "A3"),
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("7", "A4"),
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("8", "A5"),
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("9", "A6"),
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("10", "A7"),
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]))
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self.assertEqual(list(c), [
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("pmod_0:1", "A0"),
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("pmod_0:2", "A1"),
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("pmod_0:3", "A2"),
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("pmod_0:4", "A3"),
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("pmod_0:7", "A4"),
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("pmod_0:8", "A5"),
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("pmod_0:9", "A6"),
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("pmod_0:10", "A7"),
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])
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self.assertEqual(repr(c),
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"(connector pmod 0 1=>A0 2=>A1 3=>A2 4=>A3 7=>A4 8=>A5 9=>A6 10=>A7)")
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def test_dict(self):
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c = Connector("ext", 1, {"DP0": "A0", "DP1": "A1"})
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self.assertEqual(c.name, "ext")
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self.assertEqual(c.number, 1)
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self.assertEqual(c.mapping, OrderedDict([
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("DP0", "A0"),
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("DP1", "A1"),
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]))
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def test_wrong_io(self):
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with self.assertRaises(TypeError,
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msg="Connector I/Os must be a dictionary or a string, not []"):
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Connector("pmod", 0, [])
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def test_wrong_dict_key_value(self):
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with self.assertRaises(TypeError,
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msg="Connector pin name must be a string, not 0"):
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Connector("pmod", 0, {0: "A"})
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with self.assertRaises(TypeError,
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msg="Platform pin name must be a string, not 0"):
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Connector("pmod", 0, {"A": 0})
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