hdl._ast: deprecate Value.implies
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@ -994,8 +994,9 @@ class Value(metaclass=ABCMeta):
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"""
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return Operator("r^", [self])
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# TODO(amaranth-0.6): remove
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@deprecated("`a.implies(b)` is deprecated, use `~a | b` instead")
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def implies(self, conclusion):
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# TODO: should we document or just deprecate this?
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return ~self | conclusion
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def __check_shamt(self):
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@ -566,7 +566,6 @@ Operation Description Notes
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``a & b`` bitwise AND
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``a | b`` bitwise OR
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``a ^ b`` bitwise XOR
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``a.implies(b)`` bitwise IMPLY_
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``a >> b`` arithmetic right shift by variable amount [#opB1]_, [#opB2]_
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``a << b`` left shift by variable amount [#opB2]_
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``a.rotate_left(i)`` left rotate by constant amount [#opB3]_
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@ -575,7 +574,6 @@ Operation Description Notes
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``a.shift_right(i)`` right shift by constant amount [#opB3]_
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===================== ========================================== ======
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.. _IMPLY: https://en.wikipedia.org/wiki/IMPLY_gate
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.. [#opB1] Logical and arithmetic right shift of an unsigned value are equivalent. Logical right shift of a signed value can be expressed by :ref:`converting it to unsigned <lang-convops>` first.
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.. [#opB2] Shift amount must be unsigned; integer shifts in Python require the amount to be positive.
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.. [#opB3] Shift and rotate amounts can be negative, in which case the direction is reversed.
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@ -6,6 +6,7 @@ from amaranth.hdl._ast import *
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with warnings.catch_warnings():
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warnings.filterwarnings(action="ignore", category=DeprecationWarning)
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from amaranth.hdl.rec import *
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from amaranth._utils import _ignore_deprecated
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from .utils import *
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@ -299,8 +300,9 @@ class RecordTestCase(FHDLTestCase):
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self.assertEqual(repr(r1.any()), "(r| (cat (sig r1__a)))")
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self.assertEqual(repr(r1.all()), "(r& (cat (sig r1__a)))")
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self.assertEqual(repr(r1.xor()), "(r^ (cat (sig r1__a)))")
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self.assertEqual(repr(r1.implies(1)), "(| (~ (cat (sig r1__a))) (const 1'd1))")
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self.assertEqual(repr(r1.implies(s1)), "(| (~ (cat (sig r1__a))) (sig s1))")
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with _ignore_deprecated():
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self.assertEqual(repr(r1.implies(1)), "(| (~ (cat (sig r1__a))) (const 1'd1))")
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self.assertEqual(repr(r1.implies(s1)), "(| (~ (cat (sig r1__a))) (sig s1))")
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# bit_select, word_select, matches,
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self.assertEqual(repr(r1.bit_select(0, 1)), "(slice (cat (sig r1__a)) 0:1)")
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@ -156,12 +156,15 @@ class FIFOModelEquivalenceSpec(Elaboratable):
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gold.w_data.eq(dut.w_data),
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]
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m.d.comb += Assert(dut.r_rdy.implies(gold.r_rdy))
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m.d.comb += Assert(dut.w_rdy.implies(gold.w_rdy))
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with m.If(dut.r_rdy):
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m.d.comb += Assert(gold.r_rdy)
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with m.If(dut.w_rdy):
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m.d.comb += Assert(gold.w_rdy)
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m.d.comb += Assert(dut.r_level == gold.r_level)
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m.d.comb += Assert(dut.w_level == gold.w_level)
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m.d.comb += Assert(dut.r_rdy.implies(dut.r_data == gold.r_data))
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with m.If(dut.r_rdy):
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m.d.comb += Assert(dut.r_data == gold.r_data)
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return m
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